Abstract: A display engine comprises a surface splitter to generate frame buffer coordinates to split frame buffer data into a plurality of regions, each corresponding to a frame buffer coordinate, a pipeline, including a plurality of pipes, to receive the frame buffer coordinates, wherein two or more of the plurality of pipes operate in parallel to process frame buffer data corresponding to a region of the frame buffer identified by the frame buffer coordinates, a first of a plurality of transcoders to merge the frame buffer data from each of the two or more pipes into an output signal whenever the display engine is operating in a multi-pipe collaboration mode and a multiplexer (Mux) and multi-stream arbiter to control an order of transmission of the frame buffer data from each of the two or more pipes to the first transcoder based on a fetch order received from the surface splitter.