Abstract: A digitally implemented demodulator. A frequency-modulated signal is applied to a limiting amplifier such that the signal amplitude is fixed at a constant level. The signal is undersampled and quadrature demodulated. The demodulator generates the cross-product of the baseband complex envelope to recover the original modulating signal. A digital Frequency Shift Keyed signal can be further recovered by applying the recovered signal to a data slicer to square-up the signal, and a matched filter for improved error resistance.

Abstract: A phase-locked loop controller for a frequency hopping communications system which utilizes an indirect addressing scheme to access PLL data is provided. The controller is hardware-implemented, with little or no microcontroller processing overhead required. The controller enables simple synchronization with other units in a communications infrastructure implementation. The controller provides a simple interface for implementing dynamic channel allocation methods. An override port allows external control of the PLL with which the controller is associated. Finally, the controller can control auxilliary aspects of system operation, such as powering down a transmitter while changing PLL tuning.

Abstract: The present disclosure discloses an apparatus for generating a shaped waveform derived from a binary input signal. The apparatus receives a binary input signal and a sample clock signal. The sample clock signal changes the state of an up/down counter. The binary input signal controls the counting direction of the counter. The counter addresses a lookup table containing stored values. Also disclosed is the apparatus in which the lookup table output is converted to an analog signal by a digital-to-analog converter. The lookup table can be programmed such that the circuit output is equivalent to a filtered version of the binary input signal. The apparatus may optionally be enabled or disabled, such that the apparatus output assumes a predetermined state when disabled.