Patents by Inventor Dipal HALDER

Dipal HALDER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230385493
    Abstract: Various embodiments of the present disclosure provide for redacting Network-on-Chip (NoC) functionality in a System-on-Chip (SoC). In one example, an embodiment provides for receiving a Register Transfer Level (RTL) source code that models a design for an SoC via a hardware description language, converting one or more routing tables related to the RTL source code with one or more configurable logic tables, replacing one or more connections related to the RTL source code with one or more programmable multiplexers, generating a transformed RTL source code for the SoC based on the one or more configurable logic tables and the one or more programmable multiplexers, and/or providing an attack-resistant obfuscated SoC based on the transformed RTL source code.
    Type: Application
    Filed: May 30, 2023
    Publication date: November 30, 2023
    Inventors: Sandip RAY, Maneesh MERUGU, Dipal HALDER