Patents by Inventor Dipankar

Dipankar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12288062
    Abstract: Disclosed embodiments relate to instructions for fused multiply-add (FMA) operations with variable-precision inputs. In one example, a processor to execute an asymmetric FMA instruction includes fetch circuitry to fetch an FMA instruction having fields to specify an opcode, a destination, and first and second source vectors having first and second widths, respectively, decode circuitry to decode the fetched FMA instruction, and a single instruction multiple data (SIMD) execution circuit to process as many elements of the second source vector as fit into an SIMD lane width by multiplying each element by a corresponding element of the first source vector, and accumulating a resulting product with previous contents of the destination, wherein the SIMD lane width is one of 16 bits, 32 bits, and 64 bits, the first width is one of 4 bits and 8 bits, and the second width is one of 1 bit, 2 bits, and 4 bits.
    Type: Grant
    Filed: December 28, 2023
    Date of Patent: April 29, 2025
    Assignee: Intel Corporation
    Inventors: Dipankar Das, Naveen K. Mellempudi, Mrinmay Dutta, Arun Kumar, Dheevatsa Mudigere, Abhisek Kundu
  • Publication number: 20250130419
    Abstract: A system for detecting and cleaning contaminants from an imaging optical path, comprising an imaging device configured to receive a slide and capture a first slide image, at least a computing device configured to determine a contaminant presence indicator associated with a contaminant within an optical path of the imaging device based on the first slide image and execute a contaminant cleaning protocol as a function of the contaminant presence indicator, a contaminant removal mechanism configured to remove the contaminant from the optical path according to the contaminant cleaning protocol, wherein the computing device is further configured to re-evaluate the contaminant presence indicator based on a second slide image of the slide captured using the imaging device and request a user input upon a positive re-evaluation of the contaminant presence indicator.
    Type: Application
    Filed: September 6, 2024
    Publication date: April 24, 2025
    Applicant: Pramana, Inc.
    Inventors: Prasanth Perugupalli, Ajay Chadha, Vinothkumar Anbalagan, Rohan Prateek, Shilpa G. Krishna, Dipankar Das, Somesh Singh
  • Publication number: 20250128403
    Abstract: An apparatus and method of use of a mechanism that converts rotary motion into linear motion are disclosed. The method includes mechanically connecting, using a first connecting component, a rotary component and one or more movable components, mechanically connecting, using a second connecting component, a plurality of gripping components and the one or more movable components, generating, using the rotary component, rotary motion about a rotational axis, transferring, using the first connecting component, the rotary motion to the one or more movable components, transferring, using the second connecting component, the off-axis motion of the one or more movable components to the plurality of gripping components and moving the plurality of gripping components linearly in opposite directions.
    Type: Application
    Filed: October 20, 2023
    Publication date: April 24, 2025
    Applicant: Pramana Inc.
    Inventors: S Jayakrishna, Bhaskar Shetty, Ajay Chadha, Dipankar Das, Rameesh Varshan, Gourisetti Ravi Teja, Prasanth Perugupalli, Abhishek Chikkanduru Nagaraj
  • Patent number: 12273264
    Abstract: Techniques are disclosed for maintaining processing unit core affinity for fragmented packets. In one example, a service physical interface card (PIC) implementing a service plane of a network device receives fragmented and/or non-fragmented packet data for a traffic flow. The service PIC comprises at least one processing unit comprising multiple cores. A routing engine operating in a control plane of the network device defines one or more core groups comprising a subset of the cores. The routing engine assigns the traffic flow to a core group and a forwarding engine operating in a forwarding plane of the network device forwards the packet data for the traffic flow to the assigned core group. A core of the assigned core group applies a network service to the fragmented and/or non-fragmented packet data for the traffic flow, and the forwarding engine forwards the packet data for the traffic flow toward a destination.
    Type: Grant
    Filed: February 6, 2024
    Date of Patent: April 8, 2025
    Assignee: Juniper Networks, Inc.
    Inventors: Dipankar Barman, Chin Man Kim
  • Patent number: 12263848
    Abstract: A method of extending connectivity of a recipient vehicle may be executed by a non-transitory computer-readable medium. During an ignition off state of the recipient vehicle, the method includes disabling a recipient cellular network access device (NAD) of the recipient vehicle and connecting to a low power communications source. The method includes communicating with a centralized location over the low power communications source. The low power communications source may be a recipient Bluetooth® low energy (BLE) within the recipient vehicle. The method may include connecting to a donor vehicle proximate the recipient vehicle. The donor vehicle includes a donor NAD and a donor BLE, such that the donor NAD of the donor vehicle communicates with the centralized location on behalf of the recipient vehicle.
    Type: Grant
    Filed: August 17, 2022
    Date of Patent: April 1, 2025
    Assignee: GM Global Technology Operations LLC
    Inventors: Andrew J. MacDonald, Dipankar Pal, Russell A. Patenaude, Matthew E. Gilbert-Eyres, Eric T. Hosey, Venkata Naga Siva Vikas Vemuri
  • Publication number: 20250104847
    Abstract: An apparatus for identifying regions of interest during slide digitization is disclosed. The apparatus includes at least processor and a memory communicatively connected to the processor. The memory contains instructions configuring the processor to receive a user dataset associated with at least a pathology slide. The memory contains instructions configuring the processor to identify one or more regions of interest within at least a pathology slide as a function of the user dataset. The memory contains instructions configuring the processor to identify at least one scan parameter as a function of the one or more regions of interest. The memory contains instructions configuring the processor to generate a digitized slide by scanning the at least a pathology slide as a function the at least one scan parameter.
    Type: Application
    Filed: December 7, 2024
    Publication date: March 27, 2025
    Applicant: Pramana, Inc.
    Inventors: Prasanth Perugupalli, Jaya Jain, Durgaprasad Dodle, Prateek Jain, Suhash Gerald, Dipankar Das
  • Publication number: 20250082654
    Abstract: The present invention relates to methods of treatment or prevention of fatty liver disease, nonalcoholic fatty liver disease (NAFLD) including nonalcoholic steatohepatitis (NASH), cirrhosis, liver fibrosis, hepatocellular carcinoma and related liver disease and conditions by administering an effective amount of a GABAB agonist, lesogaberan (AZD3355), or related compounds.
    Type: Application
    Filed: September 16, 2024
    Publication date: March 13, 2025
    Applicant: Icahn School of Medicine at Mount Sinai
    Inventors: Joel DUDLEY, Scott FRIEDMAN, Benjamin READHEAD, Christine BECKER, Dipankar BHATTACHARYA
  • Publication number: 20250080047
    Abstract: In an example, a system includes a first transistor having a first terminal coupled to a current mirror and a control terminal coupled to a first current source and a resistor. The system includes a second transistor having a first terminal coupled to the current mirror, a second terminal coupled to a second terminal of the first transistor, and a control terminal coupled to the resistor and a second current source. The system includes a third transistor having a first terminal coupled to a voltage terminal, a second terminal coupled to the control terminal of the second transistor, and a control terminal coupled to the first terminal of the second transistor. The system includes a fourth transistor having a control terminal coupled to the current mirror, first and second terminals coupled to one another and to the second terminal of the first transistor.
    Type: Application
    Filed: February 22, 2024
    Publication date: March 6, 2025
    Inventors: Prathamesh PILANKAR, Akhila GUNDAVARAPU, Dipankar MANDAL
  • Publication number: 20250075084
    Abstract: A composite comprising: substrate having thereon an intermediate layer and a diamond-like carbon (DLC) top layer on said intermediate layer, with increased adhesion strength to DLC and other hard coatings, and which provides a buffer layer for adjusting the uneven expansion/compression behavior of DLC coatings and substrates.
    Type: Application
    Filed: November 20, 2024
    Publication date: March 6, 2025
    Applicant: BOARD OF TRUSTEES OF THE UNIVERSITY OF ARKANSAS
    Inventors: Dipankar Choudhury, Min Zou
  • Patent number: 12245512
    Abstract: The present invention relates to an actuator including: a first ionic polymer layer disposed on underside of a first electrode layer; a second ionic polymer layer disposed on top of a second electrode layer; and a porous conducting interlayer disposed between the first ionic polymer layer and the second ionic polymer layer.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: March 4, 2025
    Assignee: POSTECH ACADEMY-INDUSTRY FOUNDATION
    Inventors: Moon Jeong Park, Hyeon Seong Ham, Dipankar Barpuazary
  • Publication number: 20250066930
    Abstract: The disclosure provides for methods and systems to create active supramolecular materials by using electrically fueled dissipative assembly, and applications thereof, including in electronic devices.
    Type: Application
    Filed: July 22, 2022
    Publication date: February 27, 2025
    Inventors: Zhibin Guan, Dipankar Barpuzary, Serxho Selmani, Eric Schwartz
  • Patent number: 12238076
    Abstract: Methods and systems for modifying network traffic data. The method of modifying network traffic data may include receiving a network traffic data unit by a switching engine; performing an analysis on the network traffic data unit to obtain network tunnel information; generating encryption information based on the network tunnel information; and securing the network traffic data unit, by an encryption engine, based on the encryption information.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: February 25, 2025
    Assignee: ARISTA NETWORKS, INC.
    Inventors: Dipankar Bhatt Acharya, Kartik Chandran, Hugh W. Holbrook, François Labonté, Sambath Kumar Balasubramanian
  • Publication number: 20250061318
    Abstract: One embodiment provides for a machine-learning accelerator device a multiprocessor to execute parallel threads of an instruction stream, the multiprocessor including a compute unit, the compute unit including a set of functional units, each functional unit to execute at least one of the parallel threads of the instruction stream. The compute unit includes compute logic configured to execute a single instruction to scale an input tensor associated with a layer of a neural network according to a scale factor, the input tensor stored in a floating-point data type, the compute logic to scale the input tensor to enable a data distribution of data of the input tensor to be represented by a 16-bit floating point data type.
    Type: Application
    Filed: August 28, 2024
    Publication date: February 20, 2025
    Applicant: Intel Corporation
    Inventors: NAVEEN MELLEMPUDI, DIPANKAR DAS
  • Patent number: 12229087
    Abstract: One or more techniques and/or computing devices are provided for managing an arbitrary set of storage items using a granset. For example, a storage controller may host a plurality of storage items and/or logical unit numbers (LUNs). A subset of the storage items are grouped into a consistency group. A granset is created for tracking, managing, and/or providing access to the storage items within the consistency group. For example, the granset comprises application programming interfaces (APIs) and/or properties used to provide certain levels of access to the storage items (e.g., read access, write access, no access), redirect operations to access either data of an active file system or to a snapshot, fence certain operations (e.g., rename and delete operations), and/or other properties that apply to each storage item within the consistency group. Thus, the granset provides a persistent on-disk layout used to manage an arbitrary set of storage items.
    Type: Grant
    Filed: December 4, 2023
    Date of Patent: February 18, 2025
    Assignee: NetApp, Inc.
    Inventors: Devang Kundanlal Shah, Dipankar Roy, Krishnaveni Budati, Kai Tan, Pranab Patnaik, Akhil Kaushik
  • Publication number: 20250045186
    Abstract: Disclosed techniques relate to instrumenting applications. In an example, a method instantiates a tracer application based on a start of the web page application. The method automatically logs a start of a first span and executes first operations associated with the first span. The method automatically logs an end of the first span based upon a completion of the first operations. The method automatically logs a start of a second span based on an event initiated by an interaction with the web page application. The method detects, via the tracer application, that a period of inactivity of the web browser occurred and the second span was active before the period of inactivity. The method associates the second span with the period of inactivity based on the detecting. The method automatically logs an end of the second span.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 6, 2025
    Applicant: Oracle International Corporation
    Inventors: Kevin J. Cirone, Blake T. Sullivan, Dipankar Bajpai
  • Publication number: 20250045188
    Abstract: Disclosed techniques relate to error detection and debugging. In an example, a method involves providing, to a client device, an instrumented web page application that includes a tracer. The method further involves receiving a tracing log including a hierarchy of spans associated with execution of the web page application. Each span represents an execution of operations associated with an event and has an associated timestamp. The method further involves identifying, from the hierarchy of spans, one or more spans. The one or more spans are associated with a respective interaction by the user with the web page application. The method further involves deriving a sequence of events, by extracting, for each identified span and the associated timestamp, a respective event. The method further involves executing the sequence of events within an additional instance of the web page application on a developer device.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 6, 2025
    Applicant: Oracle International Corporation
    Inventors: Kevin J. Cirone, Blake T. Sullivan, Dipankar Bajpai
  • Publication number: 20250045192
    Abstract: Disclosed techniques relate to curing defects in software. In an example, a method involves receiving, from a first and second tracer, a first and second tracing log respectively. The first and second tracing log include log tracing data represented by a plurality of spans of respective instances of a web page application. The plurality of spans are associated with corresponding events of the respective instances of the web page application. The method further involves generating a first logical tree from the first tracing log and a second logical tree from the second tracing log. The logical trees include a respective plurality of nodes to represent chronological order of events within respective instances of the web page application and an additional node outside of the chronological order. The method further involves identifying correspondences and differences between nodes of the logical trees and generating a report on the set of spans.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 6, 2025
    Applicant: Oracle International Corporation
    Inventors: Kevin J. Cirone, Blake T. Sullivan, Dipankar Bajpai
  • Publication number: 20250045340
    Abstract: Disclosed techniques relate to instrumenting applications. In an example, a method involves providing a web page application with a tracer application. The method further involves accessing a source of the web page application. The method further involves detecting a reference to an element of the web page application in the source. The method further involves detecting the user interaction with the web page application. The method further involves automatically logging a start of a span based on the detection of the user interaction. The logging includes associating the span with the tracer application. The method further involves executing operations relating to the element. The method further involves determining that the element is ready for additional user interactions. The method further involves automatically logging an end of the span based upon the determining.
    Type: Application
    Filed: August 2, 2023
    Publication date: February 6, 2025
    Applicant: Oracle International Corporation
    Inventors: Kevin J. Cirone, Blake T. Sullivan, Dipankar Bajpai
  • Patent number: 12217856
    Abstract: An apparatus for identifying regions of interest during slide digitization is disclosed. The apparatus includes at least processor and a memory communicatively connected to the processor. The memory contains instructions configuring the processor to receive a user dataset associated with at least a pathology slide. The memory contains instructions configuring the processor to identify one or more regions of interest within at least a pathology slide as a function of the user dataset. The memory contains instructions configuring the processor to identify at least one scan parameter as a function of the one or more regions of interest. The memory contains instructions configuring the processor to generate a digitized slide by scanning the at least a pathology slide as a function the at least one scan parameter.
    Type: Grant
    Filed: March 12, 2024
    Date of Patent: February 4, 2025
    Assignee: Pramana, Inc.
    Inventors: Prasanth Perugupalli, Jaya Jain, Durgaprasad Dodle, Prateek Jain, Suhash Gerald, Dipankar Das
  • Patent number: 12211117
    Abstract: One embodiment provides for a method of transmitting data between multiple compute nodes of a distributed compute system, the method comprising multi-dimensionally partitioning data of a feature map across multiple nodes for distributed training of a convolutional neural network; performing a parallel convolution operation on the multiple partitions to train weight data of the neural network; and exchanging data between nodes to enable computation of halo regions, the halo regions having dependencies on data processed by a different node.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: January 28, 2025
    Assignee: Intel Corporation
    Inventors: Dipankar Das, Karthikeyan Vaidyanathan, Srinivas Sridharan