Patents by Inventor Dipankar Nag

Dipankar Nag has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240044954
    Abstract: The present application relates to current sensing circuitry (100) that comprises a differential amplifier (110) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry (100) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.
    Type: Application
    Filed: October 11, 2023
    Publication date: February 8, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Dipankar NAG, Peter HSU, Kapil R. SHARMA, Gordon J. BATES, Simon R. FOSTER, Mark J. MCCLOY-STEVENS
  • Patent number: 11835554
    Abstract: The present application relates to current sensing circuitry (100) that comprises a differential amplifier (110) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry (100) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: December 5, 2023
    Assignee: Cirrus Logic Inc.
    Inventors: Dipankar Nag, Peter Hsu, Kapil R. Sharma, Gordon J. Bates, Simon R. Foster, Mark J. McCloy-Stevens
  • Publication number: 20210333310
    Abstract: The present application relates to current sensing circuitry (100) that comprises a differential amplifier (110) comprising first and second inputs configured to sense a current across a sense resistance, and an output configured to output a current sense signal. The circuitry (100) further comprises a first current source, a second current source and a switch network operable in: a first phase in which the first current source is connected to the first input and disconnected from the output, and the second current source is connected to the output and disconnected from the first input; and a second phase in which the first current source is connected to the output and disconnected from the first input, and the second current source is connected to the first input and disconnected from the output.
    Type: Application
    Filed: December 21, 2020
    Publication date: October 28, 2021
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Dipankar NAG, Peter HSU, Kapil R. SHARMA, Gordon J. BATES, Simon R. FOSTER, Mark J. MCCLOY-STEVENS
  • Patent number: 10819366
    Abstract: Various embodiments may provide a delta sigma modulator for generating a digital output voltage. The delta sigma modulator may include a capacitance-to-voltage converter for converting a sensed continuous-in-time applied capacitance signal to a delta analog output voltage signal. The modulator may also include an integrator circuit arrangement configured to generate an analog output voltage signal based on the delta analog output voltage signal. The modulator may additionally include a quantizer circuit arrangement configured to generate the digital output signal based on the analog output voltage signal. The modulator may further include a voltage digital-to-analog converter configured to generate the analog charging voltage based on the digital output signal, thereby generating the delta analog output voltage signal based on the digital output signal.
    Type: Grant
    Filed: May 24, 2017
    Date of Patent: October 27, 2020
    Assignees: Agency for Science, Technology and Research, Nanyang Technological University
    Inventors: Neelakantan Narasimman, Dipankar Nag, Kevin Tshun Chuan Chai, Tae Hyoung Kim
  • Publication number: 20200328757
    Abstract: Various embodiments may provide a delta sigma modulator for generating a digital output voltage. The delta sigma modulator may include a capacitance-to-voltage converter for converting a sensed continuous-in-time applied capacitance signal to a delta analog output voltage signal. The modulator may also include an integrator circuit arrangement configured to generate an analog output voltage signal based on the delta analog output voltage signal. The modulator may additionally include a quantizer circuit arrangement configured to generate the digital output signal based on the analog output voltage signal. The modulator may further include a voltage digital-to-analog converter configured to generate the analog charging voltage based on the digital output signal, thereby generating the delta analog output voltage signal based on the digital output signal.
    Type: Application
    Filed: May 24, 2017
    Publication date: October 15, 2020
    Inventors: Neelakantan Narasimman, Dipankar Nag, Kevin Tshun Chuan Chai, Tae Hyoung Kim
  • Patent number: 9069367
    Abstract: A reference voltage generator is described. The reference voltage generator includes a proportional to absolute temperature (PTAT) current source, the PTAT current source being capable of providing a first current that is proportional to a temperature. The reference voltage generator further includes a current mirror comprising a first transistor and a second transistor, the current mirror configured to generate a second current proportional to the first current, wherein a ratio of the first current to the second current is equal to a ratio of a gate width of the first transistor to a gate width of the second transistor. The reference voltage generator further includes a voltage divider, the voltage divider being capable of receiving the second current, the voltage divider capable of outputting a reference voltage, the reference voltage being substantially independent from a change of the temperature.
    Type: Grant
    Filed: December 4, 2012
    Date of Patent: June 30, 2015
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Dipankar Nag, Chewn-Pu Jou
  • Patent number: 8626469
    Abstract: A method of calibrating a filter includes applying an input signal into the filter to generate an output signal, measuring a phase difference between the input signal and the output signal; determining a leading/lagging status of the phase difference; calculating a capacitor code (CAP_CODE) using the leading/lagging status; and calibrating the capacitor using the CAP_CODE.
    Type: Grant
    Filed: October 19, 2010
    Date of Patent: January 7, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dipankar Nag, Mei-Show Chen, Chewn-Pu Jou
  • Patent number: 8344720
    Abstract: A reference voltage generator includes a proportional to absolute temperature (PTAT) current source and a voltage divider. The PTAT current source is capable of providing a first current that is proportional to a temperature. The voltage divider is capable of receiving a second current that is proportional to the first current. The voltage divider is capable of outputting a reference voltage. The reference voltage is substantially independent from a change of the temperature.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: January 1, 2013
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dipankar Nag, Chewn-Pu Jou
  • Publication number: 20120095715
    Abstract: A method of calibrating a filter includes applying an input signal into the filter to generate an output signal, measuring a phase difference between the input signal and the output signal; determining a leading/lagging status of the phase difference; calculating a capacitor code (CAP_CODE) using the leading/lagging status; and calibrating the capacitor using the CAP_CODE.
    Type: Application
    Filed: October 19, 2010
    Publication date: April 19, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Dipankar Nag, Mei-Show Chen, Chewn-Pu Jou
  • Publication number: 20110068766
    Abstract: A reference voltage generator includes a proportional to absolute temperature (PTAT) current source and a voltage divider. The PTAT current source is capable of providing a first current that is proportional to a temperature. The voltage divider is capable of receiving a second current that is proportional to the first current. The voltage divider is capable of outputting a reference voltage. The reference voltage is substantially independent from a change of the temperature.
    Type: Application
    Filed: April 29, 2010
    Publication date: March 24, 2011
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Dipankar NAG, Chewn-Pu JOU