Patents by Inventor Dipesh Patel

Dipesh Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070255516
    Abstract: Voltage-binning of individual integrated circuits is achieved by operating those integrated circuits at a plurality of required clock frequencies and for each of those frequencies determining the minimum supply voltage level which produces a pass result for a series of applied test vectors.
    Type: Application
    Filed: July 2, 2007
    Publication date: November 1, 2007
    Applicant: ARM Limited
    Inventors: Dipesh Patel, Krisztian Flautner
  • Publication number: 20060184330
    Abstract: Voltage-binning of individual integrated circuits is achieved by operating those integrated circuits at a plurality of required clock frequencies and for each of those frequencies determining the minimum supply voltage level which produces a pass result for a series of applied test vectors.
    Type: Application
    Filed: April 18, 2006
    Publication date: August 17, 2006
    Applicant: ARM Limited
    Inventors: Dipesh Patel, Krisztian Flautner
  • Publication number: 20060074576
    Abstract: Voltage-binning of individual integrated circuits is achieved by operating those integrated circuits at a plurality of required clock frequencies and for each of those frequencies determining the minimum supply voltage level which produces a pass result for a series of applied test vectors.
    Type: Application
    Filed: December 6, 2005
    Publication date: April 6, 2006
    Applicant: ARM Limited
    Inventors: Dipesh Patel, Krisztian Flautner
  • Publication number: 20050107967
    Abstract: Voltage-binning of individual integrated circuits is achieved by operating those integrated circuits at a plurality of required clock frequencies and for each of those frequencies determining the minimum supply voltage level which produces a pass result for a series of applied test vectors.
    Type: Application
    Filed: August 6, 2004
    Publication date: May 19, 2005
    Applicant: ARM LIMITED
    Inventors: Dipesh Patel, Krisztian Flautner
  • Publication number: 20050077919
    Abstract: A data processing apparatus and method are provided for controlling level shifting. The data processing apparatus comprises a first component provided within a first voltage domain and operable to receive. a first supply voltage, and a second component provided within a second voltage domain and operable to receive a second supply voltage. At least one of the first and second supply voltages are dynamically variable. The data processing apparatus further comprises an interface cell between the first and second voltage domains which is operable to receive a signal issued by the first component in the first voltage domain and destined for the second component. The interface cell comprises level shifting logic operable to convert the signal issued by the first component into a corresponding signal to be propagated to the second component in the second voltage domain.
    Type: Application
    Filed: July 9, 2004
    Publication date: April 14, 2005
    Applicant: ARM LIMITED
    Inventors: Andrew Sowden, Dipesh Patel, Nicholas Salter, Harry Oldham