Abstract: A data processing apparatus and method of operation of such a data processing apparatus are disclosed. The data processing apparatus has a main processing unit operable to perform a plurality of data processing tasks, and a data engine for performing a number of those tasks on behalf of the main processing unit. At least one shared resource is allocatable to the data engine by the main processing unit for use by the data engine when performing data processing tasks on behalf of the main processing unit. The data engine comprises a data engine core for performing the tasks, and a data engine subsystem configurable by the main processing unit and arranged to manage communication between the data engine core and an allocated shared resource. The data engine core comprises a resource manager unit for acting as a master device with respect to the data engine subsystem in order to manage use of the allocated shared resource.

Abstract: An interface requests instructions from a data store storing instructions of an application to be processed by a data processor, and receives and transmits the instructions to the data processor. The interface includes: an input that receives the instructions from the data store via at least one input bus; a buffer that stores received instructions; an output that outputs instructions to the data processing apparatus via the output bus; a control signal input that receives a control signal; and a buffer controller that controls the buffer to request an instruction subsequent to a previously received instruction within an instruction stream of the application from the data store in response to detection of no control signal on the control signal input and to detection of available buffer storage capacity.

Abstract: An interface operable to request instructions from a data store storing instructions of an application to be processed by a data processor, and operable to receive and transmit said instructions to said data processor, said interface comprising: an input operable to receive said instructions from said data store via at least one input bus; a buffer operable to store said received instructions; an output operable to output said instructions to said data processing apparatus via at least one output bus; a control signal input operable to receive a control signal; and a buffer controller operable to: control said buffer to request an instruction subsequent to a previously received instruction within an instruction stream of said application from said data store in response to detection of no control signal on said control signal input and to detection of available buffer storage capacity; and in response to a control signal received at said control signal input, said controller is operable to control at least on

Abstract: A compiler is provided for compiling program instructions in dependence upon a predetermined decoder input instruction alignment. The compiler comprises a program instruction sequence generator operable to process source code to produce a sequence comprising a plurality of program instructions for input to a decoder. At least one program instruction is reordered within a storage region of program memory. The storage region has an associated memory address and an offset value. The offset value gives a starting location of said program instruction within the memory address. The reordering of the program instruction is such that manipulations of instruction units of the plurality of program instructions required to achieve the predetermined decoder input instruction alignment are less complex than manipulations that would be required if no reordering had been performed.

Abstract: A data processing apparatus and method of operation of such a data processing apparatus are disclosed. The data processing apparatus has a main processing unit operable to perform a plurality of data processing tasks, and a data engine for performing a number of those tasks on behalf of the main processing unit. At least one shared resource is allocatable to the data engine by the main processing unit for use by the data engine when performing data processing tasks on behalf of the main processing unit. The data engine comprises a data engine core for performing the tasks, and a data engine subsystem configurable by the main processing unit and arranged to manage communication between the data engine core and an allocated shared resource. The data engine core comprises a resource manager unit for acting as a master device with respect to the data engine subsystem in order to manage use of the allocated shared resource.