Patents by Inventor Dirk F. Blevins

Dirk F. Blevins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240012769
    Abstract: Examples described herein relate to a network interface device. In some examples, the network interface device includes a network interface, a direct memory access (DMA) circuitry, a host interface, memory, one or more processors, and circuitry to: based on a configuration of operation specifying a standalone operation, cause the network interface device to operate in standalone to execute one or more applications and based on a configuration of operation specifying a companion operation, cause the network interface device to operate in companion to provide at least one host system with access to one or more hardware resources accessible by the network interface device.
    Type: Application
    Filed: September 20, 2023
    Publication date: January 11, 2024
    Inventors: Francesc GUIM BERNAT, Manish DAVE, Vered BAR BRACHA, Bradley A. BURRES, Uzair QURESHI, Joseph GRECCO, Paul KAPPLER, Dirk F. BLEVINS, Mukesh Gangadhar BHAVANI VENKATESAN, Hariharan M, Marek PIOTROWSKI, Dhanya PILLAI, John MANGAN, Mandar CHINCHOLKAR, Eoin WALSH, Sumit MOHAN, Ned SMITH, Tushar Sudhakar GOHAD
  • Patent number: 10133697
    Abstract: Apparatus, systems, and/or methods may include a peripheral component interconnect express (PCIe) link to directly couple a slot with a network fabric. The slot may be defined by a surface and/or may accommodate a hardware module. A rack unit implementation may be utilized, such as a one rack unit (1U) implementation, a four rack unit (4U) implementation, and so on. The network fabric may be utilized when hardware modules communicate across the PCIe link, may be bypassed when hardware modules communicate across an additional PCIe link, and so on. The PCIe link may include a direct connect point-to-point PCIe link, a dual star PCIe link, and so on. In addition, the PCIe link may be utilized in a rack-scale architecture.
    Type: Grant
    Filed: August 16, 2017
    Date of Patent: November 20, 2018
    Assignee: Intel Corporation
    Inventors: Dirk F. Blevins, John M. Morgan, Marc A. Goldschmidt, Edward J. Pullin
  • Publication number: 20180024955
    Abstract: Apparatus, systems, and/or methods may include a peripheral component interconnect express (PCIe) link to directly couple a slot with a network fabric. The slot may be defined by a surface and/or may accommodate a hardware module. A rack unit implementation may be utilized, such as a one rack unit (1U) implementation, a four rack unit (4U) implementation, and so on. The network fabric may be utilized when hardware modules communicate across the PCIe link, may be bypassed when hardware modules communicate across an additional PCIe link, and so on. The PCIe link may include a direct connect point-to-point PCIe link, a dual star PCIe link, and so on. In addition, the PCIe link may be utilized in a rack-scale architecture.
    Type: Application
    Filed: August 16, 2017
    Publication date: January 25, 2018
    Inventors: Dirk F. Blevins, John M. Morgan, Marc A. Goldschmidt, Edward J. Pullin
  • Patent number: 9792243
    Abstract: Apparatus, systems, and/or methods may include a peripheral component interconnect express (PCIe) link to directly couple a slot with a network fabric. The slot may be defined by a surface and/or may accommodate a hardware module. A rack unit implementation may be utilized, such as a one rack unit (1 U) implementation, a four rack unit (4 U) implementation, and so on. The network fabric may be utilized when hardware modules communicate across the PCIe link, may be bypassed when hardware modules communicate across an additional PCIe link, and so on. The PCIe link may include a direct connect point-to-point PCIe link, a dual star PCIe link, and so on. In addition, the PCIe link may be utilized in a rack-scale architecture.
    Type: Grant
    Filed: December 26, 2013
    Date of Patent: October 17, 2017
    Assignee: Intel Corporation
    Inventors: Dirk F. Blevins, John M. Morgan, Marc A. Goldschmidt, Edward J. Pullin
  • Publication number: 20170082687
    Abstract: A method performed on a user interface device is described. The method includes connecting to a smart card where the smart card is connected to an electronic system to be de-bugged. The method also includes causing a cloud service to download customized test vectors for the electronic system to the smart card. The method also includes causing the smart card to begin execution of test software and/or operation of programmable hardware logic circuitry that uses the customized test vectors to test the electronic system.
    Type: Application
    Filed: September 23, 2015
    Publication date: March 23, 2017
    Inventors: ROLAND W. KLINGER, DIRK F. BLEVINS, JOHN M. MORGAN, ERIC D. HEATON, AI BEE LIM, LIANG-MIN WANG
  • Publication number: 20150186319
    Abstract: Apparatus, systems, and/or methods may include a peripheral component interconnect express (PCIe) link to directly couple a slot with a network fabric. The slot may be defined by a surface and/or may accommodate a hardware module. A rack unit implementation may be utilized, such as a one rack unit (1 U) implementation, a four rack unit (4 U) implementation, and so on. The network fabric may be utilized when hardware modules communicate across the PCIe link, may be bypassed when hardware modules communicate across an additional PCIe link, and so on. The PCIe link may include a direct connect point-to-point PCIe link, a dual star PCIe link, and so on. In addition, the PCIe link may be utilized in a rack-scale architecture.
    Type: Application
    Filed: December 26, 2013
    Publication date: July 2, 2015
    Inventors: Dirk F. Blevins, John M. Morgan, Marc A. Goldschmidt, Edward J. Pullin