Abstract: An embodiment integrated circuit (IC) clock distributor system includes a first IC. The first IC includes a clock synchronizer circuit and a clock generator circuit. The clock synchronizer circuit includes a first input coupled to a first clock transfer path including a replica delay of a portion of a first signal path included in an external IC. The clock synchronizer circuit also includes a second input coupled to a second clock transfer path. The clock generator circuit also includes an input coupled to an output of at least one of a reference oscillator and the clock synchronizer circuit. Delay of the second clock transfer path includes delay of the first signal path.

Abstract: Embodiments of the present invention relate to a semiconductor chip comprising a plurality of contact pads, which are arranged in an edge area on a surface of the semiconductor chip. In a semiconductor area of the semiconductor chip, every contact pad of the plurality of contact pads has an associated pad cell provided, which includes at least one of a driver or a receiver and is configured to drive output signals or receive input signals on its associated contact pad, if the driver or receiver is connected to the contact pad. Additionally, for a contact pad which is used as a supply contact pad, the driver or receiver of the associated pad cell is not connected to the contact pad or any other contact pad for driving output signals or receiving input signals on the same.

Abstract: Embodiments of the present invention relate to a semiconductor chip comprising a plurality of contact pads, which are arranged in an edge area on a surface of the semiconductor chip. In a semiconductor area of the semiconductor chip, every contact pad of the plurality of contact pads has an associated pad cell provided, which includes at least one of a driver or a receiver and is configured to drive output signals or receive input signals on its associated contact pad, if the driver or receiver is connected to the contact pad. Additionally, for a contact pad which is used as a supply contact pad, the driver or receiver of the associated pad cell is not connected to the contact pad or any other contact pad for driving output signals or receiving input signals on the same.

Abstract: A semiconductor chip includes a plurality of contact pads, which are arranged in an edge area on a surface of the semiconductor chip. In a semiconductor area of the semiconductor chip, every contact pad of the plurality of contact pads has an associated pad cell provided, which includes at least one of a driver or a receiver and is configured to drive output signals or receive input signals on its associated contact pad, if the driver or receiver is connected to the contact pad. Additionally, for a contact pad which is used as a supply contact pad, the driver or receiver of the associated pad cell is not connected to the contact pad or any other contact pad for driving output signals or receiving input signals on the same.

Abstract: Embodiments of the present invention relate to a semiconductor chip comprising a plurality of contact pads, which are arranged in an edge area on a surface of the semiconductor chip. In a semiconductor area of the semiconductor chip, every contact pad of the plurality of contact pads has an associated pad cell provided, which includes at least one of a driver or a receiver and is configured to drive output signals or receive input signals on its associated contact pad, if the driver or receiver is connected to the contact pad. Additionally, for a contact pad which is used as a supply contact pad, the driver or receiver of the associated pad cell is not connected to the contact pad or any other contact pad for driving output signals or receiving input signals on the same.

Abstract: One or more embodiments of the invention relate to an integrated circuit including a first power supply domain and at least a second power supply domain. Furthermore, the integrated circuit includes a radio frequency element connected between the first power supply domain and the second power supply domain.

Abstract: One or more embodiments of the invention relate to an integrated circuit including a first power supply domain and at least a second power supply domain. Furthermore, the integrated circuit includes a radio frequency element connected between the first power supply domain and the second power supply domain.

Abstract: A clock signal generating device is described, having an oscillator and a PLL connected downstream thereof. The clock signal generating device is distinguished by the fact that a phase shifting device is provided between the oscillator and the PLL. This phase shifting device can temporally shift the edges of the signal output by the oscillator to a variable extent, and feeds the resultant signal to the PLL as an input signal. Such a clock signal generating device makes it possible to realize a spread spectrum oscillator which is constructed in a simple manner and can be made small.

Abstract: A clock signal generating device is described, having an oscillator and a PLL connected downstream thereof. The clock signal generating device is distinguished by the fact that a phase shifting device is provided between the oscillator and the PLL. This phase shifting device can temporally shift the edges of the signal output by the oscillator to a variable extent, and feeds the resultant signal to the PLL as an input signal. Such a clock signal generating device makes it possible to realize a spread spectrum oscillator which is constructed in a simple manner and can be made small.