Abstract: A plasma cell and a method for making a plasma cell are disclosed. In accordance with an embodiment of the present invention, a cell comprises a semiconductor material, an opening disposed in the semiconductor material, a dielectric layer lining a surface of the opening, a cap layer closing the opening, a first electrode disposed adjacent the opening, and a second electrode disposed adjacent the opening.

Abstract: One or more embodiments relate to a semiconductor structure, comprising: a conductive pad, the conductive pad including a plurality of laterally spaced apart gaps diposed at least partially through the conductive pad.

Abstract: Embodiments related to controlling of photo-generated charge carriers are described and depicted.

Abstract: In accordance with an embodiment of the present invention, a semiconductor device includes a semiconductor chip having a first side and an opposite second side, and a chip contact pad disposed on the first side of the semiconductor chip. A dielectric liner is disposed over the semiconductor chip. The dielectric liner includes a plurality of openings over the chip contact pad. A interconnect contacts the semiconductor chip through the plurality of openings at the chip contact pad.

Abstract: A semiconductor device includes a semiconductor substrate and a semiconductor mass element configured to move in response to an applied acceleration. The mass element is defined by trenches etched into the semiconductor substrate and a cavity below the mass element. The semiconductor device includes a sensing element configured to sense movement of the mass element.

Abstract: One or more embodiments relate to a method for forming a semiconductor structure, comprising: providing a workpiece; forming a dielectric barrier layer over the workpiece; forming an opening through the dielectric barrier layer; forming a seed layer over the dielectric barrier layer and within the dielectric barrier layer opening; and electroplating a first fill layer on the seed layer.

Abstract: A method for etching a layer assembly, the layer assembly including an intermediate layer sandwiched between an etch layer and a stop layer, the method including a step of etching the etch layer using a first etchant and a step of etching the intermediate layer using a second etchant. The first etchant includes a first etch selectivity of at least 5:1 with respect to the etch layer and the intermediate layer. The second etchant includes a second etch selectivity of at least 5:1 with respect to the intermediate layer and the stop layer. The first etchant being is different from the second etchant.

Abstract: In one embodiment, a method of forming a semiconductor device includes forming a metal line over a substrate and depositing an alloying material layer over a top surface of the metal line. The method further includes forming a protective layer by combining the alloying material layer with the metal line.

Abstract: A plasma cell and a method for making a plasma cell are disclosed. In accordance with an embodiment of the present invention, a cell comprises a semiconductor material, an opening disposed in the semiconductor material, a dielectric layer lining a surface of the opening, a cap layer closing the opening, a first electrode disposed adjacent the opening, and a second electrode disposed adjacent the opening.

Abstract: One or more embodiments relate to a semiconductor structure, comprising: a conductive pad, the conductive pad including a plurality of laterally spaced apart gaps diposed at least partially through the conductive pad.

Abstract: A method for etching a layer assembly, the layer assembly including an intermediate layer sandwiched between an etch layer and a stop layer, the method including a step of etching the etch layer using a first etchant and a step of etching the intermediate layer using a second etchant. The first etchant includes a first etch selectivity of at least 5:1 with respect to the etch layer and the intermediate layer. The second etchant includes a second etch selectivity of at least 5:1 with respect to the intermediate layer and the stop layer. The first etchant being different from the second etchant.

Abstract: A semiconductor device includes a semiconductor substrate and a semiconductor mass element configured to move in response to an applied acceleration. The mass element is defined by trenches etched into the semiconductor substrate and a cavity below the mass element. The semiconductor device includes a sensing element configured to sense movement of the mass element.

Abstract: An integrated circuit arrangement is provided, including a transistor including a gate region; and a wavelength conversion element, wherein the wavelength conversion element may include the same material or same materials as the gate region of the transistor.

Abstract: A method for providing a pressure sensor substrate comprises creating a first cavity that extends inside the substrate in a first direction perpendicular to a main surface of the substrate, and that extends inside the substrate, in a second direction perpendicular to the first direction, into a first venting area of the substrate; creating a second cavity that extends in the first direction inside the substrate, that extends in parallel to the first cavity in the second direction, and that does not extend into the first venting area; and opening the first cavity in the first venting area.

Abstract: A semiconductor device includes a semiconductor substrate and a semiconductor mass element configured to move in response to an applied acceleration. The mass element is defined by trenches etched into the semiconductor substrate and a cavity below the mass element. The semiconductor device includes a sensing element configured to sense movement of the mass element and a complementary metal-oxide-semiconductor (CMOS) circuit formed on the substrate.

Abstract: One or more embodiments relate to a method for forming a semiconductor structure, comprising: providing a workpiece; forming a dielectric barrier layer over the workpiece; forming an opening through the dielectric barrier layer; forming a seed layer over the dielectric barrier layer and within the dielectric barrier layer opening; and electroplating a first fill layer on the seed layer.

Abstract: A method for providing a pressure sensor substrate comprises creating a first cavity that extends inside the substrate in a first direction perpendicular to a main surface of the substrate, and that extends inside the substrate, in a second direction perpendicular to the first direction, into a first venting area of the substrate; creating a second cavity that extends in the first direction inside the substrate, that extends in parallel to the first cavity in the second direction, and that does not extend into the first venting area; and opening the first cavity in the first venting area.

Abstract: A semiconductor device includes a first cavity within a semiconductor substrate and a second cavity within the semiconductor substrate. The second cavity is open to an atmosphere and defines a first lamella between the first cavity and the second cavity. The semiconductor device includes a first sense element configured for sensing a pressure on the first lamella.

Abstract: A semiconductor device includes a semiconductor substrate and a semiconductor mass element configured to move in response to an applied acceleration. The mass element is defined by trenches etched into the semiconductor substrate and a cavity below the mass element. The semiconductor device includes a sensing element configured to sense movement of the mass element and a complementary metal-oxide-semiconductor (CMOS) circuit formed on the substrate.

Abstract: A semiconductor device includes a first cavity within a semiconductor substrate and a second cavity within the semiconductor substrate. The second cavity is open to an atmosphere and defines a first lamella between the first cavity and the second cavity. The semiconductor device includes a first sense element configured for sensing a pressure on the first lamella.