Abstract: An approach is provided that reserves a software lock for a waiting thread is presented. When a software lock is released by a first thread, a second thread that is waiting for the same resource controlled by the software lock is woken up. In addition, a reservation to the software lock is established for the second thread. After the reservation is established, if the lock is available and requested by a thread other than the second thread, the requesting thread is denied, added to the wait queue, and put to sleep. In addition, the reservation is cleared. After the reservation has been cleared, the lock will be granted to the next thread to request the lock.

Abstract: An operating system or virtual machine of an information handling system (IHS) initializes a resource manager to provide processor resource utilization management during workload or application execution. The resource manager captures short term interval (STI) and long term interval (LTI) processor resource utilization data and stores that utilization data within an information store of the virtual machine. If a capacity on demand mechanism is enabled, the resource manager modifies a reserved capacity value. The resource manager selects previous STI and LTI values for comparison with current resource utilization and may apply a safety margin to generate a reserved capacity or target resource utilization value for the next short term interval (STI). The hypervisor may modify existing virtual processor allocation to match the target resource utilization.

Abstract: The present invention provides a computer implemented method and apparatus to assign software threads to a common virtual processor of a data processing system having multiple virtual processors. A data processing system detects cooperation between a first thread and a second thread with respect to a lock associated with a resource of the data processing system. Responsive to detecting cooperation, the data processing system assigns the first thread to the common virtual processor. The data processing system moves the second thread to the common virtual processor, whereby a sleep time associated with the lock experienced by the first thread and the second thread is reduced below a sleep time experienced prior to the detecting cooperation step.

Abstract: An operating system or virtual machine of an information handling system (IHS) initializes a resource manager to provide processor resource utilization management during workload or application execution. The resource manager captures short term interval (STI) and long term interval (LTI) processor resource utilization data and stores that utilization data within an information store of the virtual machine. If a capacity on demand mechanism is enabled, the resource manager modifies a reserved capacity value. The resource manager selects previous STI and LTI values for comparison with current resource utilization and may apply a safety margin to generate a reserved capacity or target resource utilization value for the next short term interval (STI). The hypervisor may modify existing virtual processor allocation to match the target resource utilization.

Abstract: A method, system, and computer usable program product for selective memory compression for multi-threaded applications are provided in the illustrative embodiments. An identification of a memory region that is shared by a plurality of threads in an application is received at a first entity in a data processing system. A request for a second entity in the data processing system to keep the memory region uncompressed when compressing at least one of a plurality of memory regions that comprise the memory region is provided from the first entity to the second entity.

Abstract: A system and method is provided for delaying a priority boost of an execution thread. When a thread prepares to enter a critical section of code, such as when the thread utilizes a shared system resource, a user mode accessible data area is updated indicating that the thread is in a critical section and, if the kernel receives a preemption event, the priority boost that the thread should receive. If the kernel receives a preemption event before the thread finishes the critical section, the kernel applies the priority boost on behalf of the thread. Often, the thread will finish the critical section without having to have its priority actually boosted. If the thread does receive an actual priority boost then, after the critical section is finished, the kernel resets the thread's priority to a normal level.

Abstract: Management of a UNIX-style storage pools is enhanced by specially managing one or more memory management inodes associated with pinned and allocated pages of data storage by providing indirect access to the pinned and allocated pages by one or more user processes via a handle, while preventing direct access of the pinned and allocated pages by the user processes without use of the handles; scanning periodically hardware status bits in the inodes to determine which of the pinned and allocated pages have been recently accessed within a pre-determined period of time; requesting via a callback communication to each user process to determine which of the least-recently accessed pinned and allocated pages can be either deallocated or defragmented and compacted; and responsive to receiving one or more page indicators of pages unpinned by the user processes, compacting or deallocating one or more pages corresponding to the page indicators.

Abstract: Methods, systems, and products are disclosed for user defined preferred DNS routing that include mapping for a user in a data communications application a domain name of a network host to a network address for a preferred DNS server, wherein the preferred DNS server has a network address for the domain name; receiving from the user a request for access to a resource accessible through the network host; and routing to the preferred DNS server a DNS request for the network address of the network host, the DNS request including the domain name of the network host. In typical embodiments, mapping a domain name to a network address for a preferred DNS server is carried out by storing, through the data communication application, the domain name in association with the network address for a preferred DNS server in a data structure in computer memory.

Abstract: Distributing a thread for running on a physical processor and enabling the physical processor to be switched into a low power snooze state when said running thread is IDLE. However, this switching into said low power state is enabled to be delayed by a delay time from an IDLE dispatch from said running thread; such delay is determined by tracking the rate of the number of said IDLE dispatches per processor clock interval and dynamically varying said delay time wherein the delay time is decreased when said rate of IDLE dispatches increases and the delay time is increased when said rate of IDLE dispatches decreases.

Abstract: Embodiments of the invention provide a method, apparatus and computer program product for enabling a thread to acquire a lock associated with a shared resource, when a locking mechanism is used therewith, wherein each embodiment reduces waiting time and enhances efficiency in using the shared resource. One embodiment is associated with a plurality of processors, which includes two or more processors that each provides a specified thread to access a shared resource. The shared resource can only be accessed by one thread at a given time, a locking mechanism enables a first one of the specified threads to access the shared resource while each of the other specified threads is retained in a waiting queue, and a second one of the specified threads occupies a position of highest priority in the queue.

Abstract: A method manages memory paging operations. Responsive to a request to page out a memory page from a shared memory pool, the method identifies whether a physical space within one of a number of paging space devices has been allocated for the memory page. If physical space within the paging space device has not been allocated for the memory page, a page priority indicator for the memory page is identified. The memory page is then allocated to one of a number of memory pools within one of the number of paging space devices. The memory page is allocated one of the memory pools according to the page priority indicator of the memory page. The memory page is then written to the allocated memory pools.

Abstract: An information handling system (IHS) loads an application that may include startup code and steady state operation code. The IHS allocates one region of system memory to the startup code and another region of system memory to the steady state operation code. A programmer inserts a memory release call command at a location that marks the end of execution of the startup code. After executing the startup code, the operation system receives the memory release call command. In response to the memory release call command, the operating system releases or de-allocates the region of memory to which the IHS previously assigned to the startup code. This enables the released memory for use by code other than the startup code, such as other code pages, library pages and other code.

Abstract: A system and method for implementing a fast file synchronization in a data processing system. A memory management unit divides a file stored in system memory into a collection of data block groups. In response to a master (e.g., processing unit, peripheral, etc.) modifying a first data block group among the collection of data block groups, the memory management unit writes a first block group number associated with the first data block group to system memory. In response to a master modifying a second data block group, the memory management unit writes the first data block group to a hard disk drive and writes a second data block group number associated with the second data block group to system memory. In response to a request to update modified data block groups of the file stored in the system memory to the hard disk drive, the memory management unit writes the second data block to the hard disk drive.

Abstract: Scheduling threads in a multi-processor computer system including establishing an interrupt threshold for a thread, where the interrupt threshold represents a maximum permissible number of interrupts during thread execution on a processor; executing the thread on a current processor, where the thread has thread affinity for one or more processors including the current processor; counting a number of interrupts during execution of the thread on the current processor; and removing thread affinity for the current processor in dependence upon the counted number of interrupts and the interrupt threshold.

Abstract: A computer implemented method, apparatus, and computer usable code for receiving data from a sender across a network connection for the data transfer. An expected size for a congestion window for the sender is identified. An amount of the data received from the sender is tracked. An acknowledgment is sent in response to the amount of data received from the sender meet in the expected size of the congestion window for the sender.

Abstract: A method, system and computer program product for eliminating the latency in searching for contiguous memory space by an IO DMA request of a device driver. Three new application programming interfaces (APIs) are provided within the operating system (OS) code that allows the device driver(s) to (1) pre-request and pre-allocate the IO DMA address range from the OS during the IPL and maintain control of the address, (2) map a system (virtual/physical) address range to a specific pre-allocated IO DMA address range, and (3) free the pre-allocated IO DMA address space back to the kernel when the space is no longer required. Utilizing these APIs enables advanced IO DMA address mapping techniques maintained by the device drivers, and the assigned/allocated IO DMA address space is no longer fragmented, and the latency of completing the IO DMA mapping is substantially reduced/eliminated.

Abstract: Identifying compatible threads in a Simultaneous Multithreading (SMT) processor environment is provided by calculating a performance metric, such as cycles per instruction (CPI), that occurs when two threads are running on the SMT processor. The CPI that is achieved when both threads were executing on the SMT processor is determined. If the CPI that was achieved is better than the compatibility threshold, then information indicating the compatibility is recorded. When a thread is about to complete, the scheduler looks at the run queue from which the completing thread belongs to dispatch another thread. The scheduler identifies a thread that is (1) compatible with the thread that is still running on the SMT processor (i.e., the thread that is not about to complete), and (2) ready to execute. The CPI data is continually updated so that threads that are compatible with one another are continually identified.

Abstract: A system and method for scheduling threads in a Simultaneous Multithreading (SMT) processor environment utilizing multiple SMT processors is provided. Poor performing threads that are being run on each of the SMT processors are identified. After being identified, the poor performing threads are moved to a different SMT processor. Data is captured regarding the performance of threads. In one embodiment, this data includes each threads' CPI value. When a thread is moved, data regarding the thread and its performance at the time it was moved is recorded along with a timestamp. The data regarding previous moves is used to determine whether a thread's performance is improved following the move.

Abstract: The present invention provides a computer implemented method and apparatus to assign software threads to a common virtual processor of a data processing system having multiple virtual processors. A data processing system detects cooperation between a first thread and a second thread with respect to a lock associated with a resource of the data processing system. Responsive to detecting cooperation, the data processing system assigns the first thread to the common virtual processor. The data processing system moves the second thread to the common virtual processor, whereby a sleep time associated with the lock experienced by the first thread and the second thread is reduced below a sleep time experienced prior to the detecting cooperation step.

Abstract: A computer-implemented system, method, and program product is disclosed for managing memory pages in a memory that includes a page replacement function. The method includes detecting that a sequence of pages is read by an application into the memory. The method continues by initiating a read-ahead to access a plurality of pages including the sequence of pages and a next page that has not yet been read, and storing the plurality in a page frame table of the memory. During the read-ahead, the method sets a soft-pin bit in the page frame table corresponding to each of the pages of the plurality of pages in the read-ahead. Each the soft-pin bit temporarily reserves its respective page from replacement by the page replacement function.