Patents by Inventor Dirk Wellekens

Dirk Wellekens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6246612
    Abstract: A method of erasing and a method of programming a nonvolatile memory cell in a chip is disclosed. Said cell comprises a semiconductor substrate including a source and a drain region and a channel therebetween, a floating gate extending over a portion of said channel, a control gate extending over another portion of the channel region, and a program gate capacitively coupled through a dielectric layer to said floating gate. The methods or schemes are using substantially the lowest possible voltage to erase a nonvolatile memory cell of the floating-gate type without having the SILC problem. Therefore, these schemes are expected to allow a further scaling of the minimum feature size of Flash memory products which is necessary for cost reduction and density increase. The present invention also aims to further decrease the voltages necessary to erase/program the memory device without degrading the corresponding performance.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: June 12, 2001
    Assignee: Interuniversitair Micro-Elektronica Centrum, vzw (IMEC vzw)
    Inventors: Jan Van Houdt, Dirk Wellekens
  • Patent number: 6144586
    Abstract: A method of erasing and a method of programming a nonvolatile memory cell in a chip is disclosed. Said cell comprises a semiconductor substrate including a source and a drain region and a channel therebetween, a floating gate extending over a portion of said channel, a control gate extending over another portion of the channel region, and a program gate capacitively coupled through a dielectric layer to said floating gate. The methods or schemes are using substantially the lowest possible voltage to erase a nonvolatile memory cell of the floating-gate type without having the SILC problem. Therefore, these schemes are expected to allow a further scaling of the minimum feature size of Flash memory products which is necessary for cost reduction and density increase.The present invention also aims to further decrease the voltages necessary to erase/program the memory device without degrading the corresponding performance.
    Type: Grant
    Filed: February 16, 2000
    Date of Patent: November 7, 2000
    Assignee: Interuniversitair Micro-Electronica Centrum, vzw
    Inventors: Jan Van Houdt, Dirk Wellekens
  • Patent number: 6058043
    Abstract: A method of erasing and a method of programming a nonvolatile memory cell in a chip is disclosed. Said cell comprises a semiconductor substrate including a source and a drain region and a channel therebetween, a floating gate extending over a portion of said channel, a control gate extending over another portion of the channel region, and a program gate capacitively coupled through a dielectric layer to said floating gate. The methods or schemes are using substantially the lowest possible voltage to erase a nonvolatile memory cell of the floating-gate type without having the SILC problem. Therefore, these schemes are expected to allow a further scaling of the minimum feature size of Flash memory products which is necessary for cost reduction and density increase. The present invention also aims to further decrease the voltages necessary to erase/program the memory device without degrading the corresponding performance.
    Type: Grant
    Filed: September 8, 1998
    Date of Patent: May 2, 2000
    Assignee: Interuniversitair Micro-Elektronica Centrum
    Inventors: Jan Van Houdt, Dirk Wellekens