Patents by Inventor Dirk Wouters

Dirk Wouters has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10367414
    Abstract: A switch mode power supply is described including a primary side for coupling to a mains supply and a secondary side for coupling to a device, an isolation transformer comprising a primary coil and a secondary coil and arranged to isolate the primary side from the secondary side, and a noise filter coupled between a primary ground at the primary side and a secondary ground at the secondary side, the noise filter having a conductance value that varies with frequency. The noise filter conductance comprises a peak conductance in a peak conductance frequency region. The noise filter is operable to reduce the common-mode noise of the switch mode power supply at frequencies occurring in the peak conductance frequency region.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: July 30, 2019
    Assignee: NXP B.V.
    Inventors: Marcel Wilhelm Rudolf Martin van Roosmalen, Petrus Cornelis Theodorus Laro, Humphrey de Groot, Bobby Jacob Daniel, Arjan van den Berg, Dirk Wouter Johannes Groeneveld
  • Patent number: 9972386
    Abstract: The present invention provides a resistive memory array arranged in a 3D stack comprising a plurality of resistivity switching memory elements laid out in an array in a first and second direction, and stacked in a third direction, a plurality of first electrodes and a plurality of second electrodes extending in the first direction, each first electrode and each second electrode being associated with the at least one resistivity switching memory element, and a plurality of transistor devices, each transistor device being electrically coupled to one of the resistivity switching memory elements, an inversion or accumulation channel of a transistor device being adapted for forming a switchable resistivity path in the third direction, between the electrically coupled resistivity switching memory element and the associated second electrode, wherein the memory array furthermore comprises at least one third electrode provided in a trench through the stack.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: May 15, 2018
    Assignee: IMEC
    Inventors: Pieter Blomme, Dirk Wouters
  • Publication number: 20170302164
    Abstract: A switch mode power supply is described including a primary side for coupling to a mains supply and a secondary side for coupling to a device, an isolation transformer comprising a primary coil and a secondary coil and arranged to isolate the primary side from the secondary side, and a noise filter coupled between a primary ground at the primary side and a secondary ground at the secondary side, the noise filter having a conductance value that varies with frequency. The noise filter conductance comprises a peak conductance in a peak conductance frequency region. The noise filter is operable to reduce the common-mode noise of the switch mode power supply at frequencies occurring in the peak conductance frequency region.
    Type: Application
    Filed: April 11, 2017
    Publication date: October 19, 2017
    Inventors: Marcel Wilhelm Rudolf Martin van Roosmalen, Petrus Cornelis Theodorus Laro, Humphrey de Groot, Bobby Jacob Daniel, Arjan van den Berg, Dirk Wouter Johannes Groeneveld
  • Patent number: 9484389
    Abstract: A method for manufacturing a three-dimensional resistive memory array is disclosed. The method comprises forming a repetitive sequence comprising an isolating layer, a semiconductor layer, a gate insulating layer, and a conductive layer. By performing a plurality of processing steps on the repetitive sequence a three-dimensional resistive memory array is obtained. A three-dimensional resistive memory array is further disclosed.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: November 1, 2016
    Assignee: IMEC
    Inventors: Dirk Wouters, Gouri Sankar Kar
  • Publication number: 20150179705
    Abstract: A method for manufacturing a three-dimensional resistive memory array is disclosed. The method comprises forming a repetitive sequence comprising an isolating layer, a semiconductor layer, a gate insulating layer, and a conductive layer. By performing a plurality of processing steps on the repetitive sequence a three-dimensional resistive memory array is obtained. A three-dimensional resistive memory array is further disclosed.
    Type: Application
    Filed: December 19, 2014
    Publication date: June 25, 2015
    Inventors: Dirk Wouters, Gouri Sankar KAR
  • Patent number: 8963431
    Abstract: A circuit is disclosed for driving a plurality of LED strings from an AC supply and arranged to, in use, drive current through a series arrangement of a plurality N of the LED strings when the AC voltage is sufficient to drive the plurality N of the LED strings: the circuit comprising a first current source configured to be switchably connected to a one end of said series arrangement of N LED strings; a series combination of a second current source and a heat dissipater, wherein the series combination of the second current source and the heat dissipater is arranged in parallel with the first current source; and a current balancer for balancing the current through the first current source and the second current source. A driver for such a circuit is also disclosed.
    Type: Grant
    Filed: March 21, 2013
    Date of Patent: February 24, 2015
    Assignee: NXP B.V.
    Inventors: Arjan van den Berg, Jie Chen, Wihelmus Hinderikus Maria Langeslag, Anton Cornelis Blom, Dirk Wouter Johannes Groeneveld
  • Patent number: 8310857
    Abstract: A resistive switching non-volatile memory element is disclosed comprising a resistive switching metal-oxide layer sandwiched between and in contact with a top electrode and a bottom electrode, the resistive switching metal oxide layer having a substantial isotropic non-stoichiometric metal-to-oxygen ratio. For example, the memory element may comprise a nickel oxide resistive switching layer sandwiched between and in contact with a nickel top electrode and a nickel bottom electrode whereby the ratio oxygen-to-nickel of the nickel oxide layer is between 0 and 0.85.
    Type: Grant
    Filed: June 2, 2010
    Date of Patent: November 13, 2012
    Assignee: IMEC
    Inventors: Ludovic Goux, Judit Lisoni Reyes, Dirk Wouters
  • Patent number: 8232174
    Abstract: The present disclosure provides a method for controlled formation of the resistive switching layer in a resistive switching device. The method comprises providing a substrate (2) comprising the bottom electrode (10), providing on the substrate a dielectric layer (4) comprising a recess (7) containing the metal for forming the resistive layer (11), providing on the substrate a dielectric layer (5) comprising an opening (8) exposing the metal of the recess, and forming the resistive layer in the recess and in the opening.
    Type: Grant
    Filed: August 31, 2007
    Date of Patent: July 31, 2012
    Assignees: NXP B.V., IMEC
    Inventors: Ludovic Goux, Dirk Wouters
  • Patent number: 8206995
    Abstract: A method for manufacturing a resistive switching memory device comprises providing a substrate comprising an electrical contact, providing on the substrate a dielectric layer comprising a trench exposing the electrical contact, and providing in the trench at least the bottom electrode and the resistive switching element of the resistive memory device. The method may furthermore comprise providing a top electrode at least on or in the trench, in contact with the resistive switching element. The present invention also provides corresponding resistive switching memory devices.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: June 26, 2012
    Assignee: IMEC
    Inventors: Judit Gloria Lisoni Reyes, Ludovic Goux, Dirk Wouters
  • Patent number: 8008644
    Abstract: A phase-change-memory cell is provided which comprises two insulated regions formed in a first phase-change material connected by a region formed in a second phase-change material. The crystallization temperature of the second phase-change material is below the crystallization temperature of the first phase-change material. By locally changing the material properties using a second PCM material, which switches phase at a lower temperature, a localized “hot spot” is obtained.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: August 30, 2011
    Assignee: NXP B.V.
    Inventors: Ludovic Goux, Dirk Wouters, Judit Lisoni, Thomas Gille
  • Patent number: 7960775
    Abstract: The present disclosure is related to non-volatile memory devices comprising a reversible resistivity-switching layer used for storing data. The resistivity of this layer can be varied between at least two stable resistivity states such that at least one bit can be stored therein. In particular this resistivity-switching layer is a metal oxide or a metal nitride. A resistivity-switching non-volatile memory element includes a resistivity-switching metal-oxide layer sandwiched between a top electrode and a bottom electrode. The resistivity-switching metal-oxide layer has a gradient of oxygen over its thickness. The gradient is formed in a thermal oxidation step. Set and reset voltages can be tuned by using different oxygen gradients.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: June 14, 2011
    Assignees: IMEC, University of South Toulon VAR
    Inventors: Lorene Courtade, Judit Lisoni Reyes, Ludovic Goux, Christian Turquat, Christophe Muller, Dirk Wouters
  • Patent number: 7897952
    Abstract: A phase-change-material memory cell is provided. The cell comprises at least one patterned layer of a phase-change material, and is characterized in that this patterned layer comprises at least two regions having different resistivities. If the resistivity of the phase-change material is higher in a well-defined area with limited dimensions (“hot spot”) than outside this area, then, for a given current flow between the electrodes, advantageously more Joule heat will be generated within this area compared to the area of the phase-change material where the resistivity is lower.
    Type: Grant
    Filed: May 18, 2006
    Date of Patent: March 1, 2011
    Assignee: NXP B.V.
    Inventors: Dirk Wouters, Ludovic Goux, Judith Lisoni, Thomas Gille
  • Publication number: 20110044089
    Abstract: A resistive switching non-volatile memory element is disclosed comprising a resistive switching metal-oxide layer sandwiched between and in contact with a top electrode and a bottom electrode, the resistive switching metal oxide layer having a substantial isotropic non-stoichiometric metal-to-oxygen ratio. For example, the memory element may comprise a nickel oxide resistive switching layer sandwiched between and in contact with a nickel top electrode and a nickel bottom electrode whereby the ratio oxygen-to-nickel of the nickel oxide layer is between 0 and 0.85.
    Type: Application
    Filed: June 2, 2010
    Publication date: February 24, 2011
    Applicant: IMEC
    Inventors: Ludovic Goux, Judit Lisoni Reyes, Dirk Wouters
  • Publication number: 20100202193
    Abstract: A memory device comprises an array of memory cells for storing data and a voltage application unit for applying voltages to the cells for writing data to the cells. Each memory cell has a first layer comprising copper in contact with a second layer comprising a chalcogenide material. The voltage application unit is arranged to write data by switching each cell between a first resistance state and a second, lower, resistance state. The voltage application unit is arranged to switch a cell to the first resistance state by applying a potential difference across the first and second layers such that the potential at the first layer is higher than the potential at the second layer by 0.5 volts or less. The voltage application unit is arranged to switch a cell to the second resistance state by applying a potential difference across the first and second layers such that the potential at the second layer is higher than the potential at the first layer by 0.5 volts or less.
    Type: Application
    Filed: April 30, 2008
    Publication date: August 12, 2010
    Applicants: NXP B.V., TERUNIVERSITAR MICROELEKTRONICA CENTRUM VZW
    Inventors: Ludovic Goux, Judit Lisoni Reyes, Thomas Gille, Dirk Wouters
  • Publication number: 20100155687
    Abstract: A method for manufacturing a resistive switching memory device comprises providing a substrate comprising an electrical contact, providing on the substrate a dielectric layer comprising a trench exposing the electrical contact, and providing in the trench at least the bottom electrode and the resistive switching element of the resistive memory device. The method may furthermore comprise providing a top electrode at least on or in the trench, in contact with the resistive switching element. The present invention also provides corresponding resistive switching memory devices.
    Type: Application
    Filed: December 4, 2009
    Publication date: June 24, 2010
    Applicant: IMEC
    Inventors: Judit Gloria Lisoni Reyes, Ludovic Goux, Dirk Wouters
  • Publication number: 20100127233
    Abstract: The present disclosure provides a method for controlled formation of the resistive switching layer in a resistive switching device. The method comprises providing a substrate (2) comprising the bottom electrode (10), providing on the substrate a dielectric layer (4) comprising a recess (7) containing the metal for forming the resistive layer (11), providing on the substrate a dielectric layer (5) comprising an opening (8) exposing the metal of the recess, and forming the resistive layer in the recess and in the opening.
    Type: Application
    Filed: August 31, 2007
    Publication date: May 27, 2010
    Applicants: NXP, B.V., INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC)
    Inventors: Ludovic Goux, Dirk Wouters
  • Publication number: 20100090192
    Abstract: For improved scalability of resistive switching memories, a cross-point resistive switching structure is disclosed wherein the plug itself is used to store the resistive switching material and where the top electrode layer is self-aligned to the plug using, for example, chemical-mechanical-polishing (CMP) or simply mechanical-polishing.
    Type: Application
    Filed: August 31, 2007
    Publication date: April 15, 2010
    Applicants: NXP, B.V., INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC)
    Inventors: Ludovic Goux, Dirk Wouters
  • Publication number: 20100072531
    Abstract: A method is disclosed for manufacturing SrxTiyO3 based metal-insulator-metal (MIM) capacitors using a low temperature Atomic Layer Deposition (ALD) process. Preferably TiN is used to form the bottom electrode. The Sr/Ti ratio in the SrxTiyO3 dielectric layer of the capacitor can be varied to tune the electric properties of the capacitor. The dielectric constant and the leakage current of the SrxTiyO3 dielectric layer decrease monotonously with the Sr content of this SrxTi1-xO3 dielectric layer. By increasing the Sr content at the interface between the SrxTiyO3 dielectric layer and the TiN bottom electrode, the interfacial equivalent-oxide thickness (EOT) can be further reduced.
    Type: Application
    Filed: September 22, 2009
    Publication date: March 25, 2010
    Applicant: IMEC
    Inventors: Jorge Kittl, Mihaela Ioana Popovici, Nicolas Menou, Dirk Wouters
  • Publication number: 20090152526
    Abstract: The present disclosure is related to non-volatile memory devices comprising a reversible resistivity-switching layer used for storing data. The resistivity of this layer can be varied between at least two stable resistivity states such that at least one bit can be stored therein. In particular this resistivity-switching layer is a metal oxide or a metal nitride. A resistivity-switching non-volatile memory element includes a resistivity-switching metal-oxide layer sandwiched between a top electrode and a bottom electrode. The resistivity-switching metal-oxide layer has a gradient of oxygen over its thickness. The gradient is formed in a thermal oxidation step. Set and reset voltages can be tuned by using different oxygen gradients.
    Type: Application
    Filed: November 7, 2008
    Publication date: June 18, 2009
    Applicants: Interuniversitair Microelektronica Centrum (IMEC) vzw, University of South Toulon Var
    Inventors: Lorene Courtade, Judit Lisoni Reyes, Ludovic Goux, Christian Turquat, Christophe Muller, Dirk Wouters
  • Patent number: 7464433
    Abstract: A wiper blade is proposed, which is used to clean windows, in particular of motor vehicles. The wiper blade is arranged with a rubber elastic wiper strip (24) on the one band surface (22) of a band-like, long-stretched-out, elastic supporting element (12) and can be placed on the to-be-wiped window (14). The other band surface (16) of the supporting element is covered by another component (40) of the wiper blade (10), at least in sections, and this covering part is provided with claw-like projections (54) arranged in the longitudinal direction of the wiper blade, which grip under holding edges (38) of the supporting element. A particularly tension-neutral and easily mountable wiper blade is achieved if the covering part (40), manufactured of an elastic plastic, is provided with an armoring (60) in the area of its projections (54) whose strength is greater than the strength of the plastic used for the covering part.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: December 16, 2008
    Assignee: Robert Bosch GmbH
    Inventors: Wolfgang Thomar, Dirk Wouters, Peter De Block, Olivier Janssens, Jos Feyaerts, Roger Van den Eynde, Wim Desmet