Abstract: A storage device utilizing internal compression codecs may reduce the overall amount of data required for storage within the memory devices, increasing storage device life spans and available storage space. Data provided to the storage device is compressed prior to storage and decompressed upon retrieval. The data may be formatted at a fixed length to streamline compression processing. The processing time of the compression codecs may be minimized through the use of hardware-based resources when needed. These compression codec storage devices may include one or more communication channels suitable for connection with a host, memory devices within a memory array, and controllers configured to transfer host data from the host-computing device to the memory array. Internal compression codecs can be configured to retrieve host data from one or more buffers, compress the host data with a fixed-input compression method, and store the compressed data within one or more memory devices.

Abstract: The present disclosure is directed to systems and methods for autonomously generating test methods for testing features included on semiconductor platforms. The systems and methods described herein either manually or autonomously receive information and/or data indicative of the features included in, on, or about a semiconductor platform to be tested. Based on the presence of features and/or feature combinations on the semiconductor platform, the systems and methods described herein autonomously select the appropriate test blocks used to generate the test method. The systems and methods described herein generate additional test methods as permutations of the selected test blocks. The validity of each test method is confirmed using dependency rules and all valid test methods are combined to form a test package that is used to test the semiconductor platform.

Abstract: The present disclosure is directed to systems and methods for autonomously generating test methods for testing features included on semiconductor platforms. The systems and methods described herein either manually or autonomously receive information and/or data indicative of the features included in, on, or about a semiconductor platform to be tested. Based on the presence of features and/or feature combinations on the semiconductor platform, the systems and methods described herein autonomously select the appropriate test blocks used to generate the test method. The systems and methods described herein generate additional test methods as permutations of the selected test blocks. The validity of each test method is confirmed using dependency rules and all valid test methods are combined to form a test package that is used to test the semiconductor platform.