Patents by Inventor Divya Mahajan

Divya Mahajan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240126611
    Abstract: The description relates to accelerator architectures for deep learning models. One example can obtain a deep learning training script associated with a deep learning model and extract an operator graph from the training script. The example can split the operator graph into first and second portions of a heterogeneous pipeline and tune a first accelerator core for the first portion of the heterogeneous pipeline and a second accelerator core for the second portion of the heterogeneous pipeline. The example can also generate a hardware architecture that includes the first accelerator core and the second accelerator core arranged to collectively accomplish the deep learning model.
    Type: Application
    Filed: October 13, 2022
    Publication date: April 18, 2024
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Amar PHANISHAYEE, Divya MAHAJAN, Janardhan KULKARNI, Miguel CASTRO, Muhammad ADNAN
  • Publication number: 20230058055
    Abstract: A method for database management that includes receiving an algorithm from a user. Based on the algorithm, a hierarchical dataflow graph (hDFG) may be generated. The method may further include generating an architecture for a chip based on the hDFG. The architecture for a chip may retrieve a data table from a database. The data table may be associated with the architecture for a chip. Finally, the algorithm may be executed against the data table, such that an action included in the algorithm is performed.
    Type: Application
    Filed: October 12, 2022
    Publication date: February 23, 2023
    Inventors: Hadi Esmaeilzadeh, Divya Mahajan, Joon Kyung Kim
  • Patent number: 11521112
    Abstract: A method for database management is disclosed. The method may include receiving an algorithm from a user. Based on the algorithm, a hierarchical dataflow graph (hDFG) may be generated. The method may further include generating an architecture for a chip based on the hDFG. The architecture for a chip may retrieve a data table from a database. The data table may be associated with the architecture for a chip. Finally, the algorithm may be executed against the data table, such that an action included in the algorithm is performed.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: December 6, 2022
    Assignee: Georgia Tech Research Corporation
    Inventors: Hadi Esmaeilzadeh, V, Divya Mahajan, Joon Kyung Kim
  • Publication number: 20220215405
    Abstract: Systems and methods for synchronizing user activity across digital channels. The method includes receiving a first request corresponding to a first user activity on a first digital channel via a user device. The method also includes storing a first real-time activity record corresponding to the first request in a database. The method further includes updating a user profile based on the first real-time activity record. The method also includes receiving a second request corresponding to a second user activity on a second digital channel via the user device. The method further includes determining an intended transaction corresponding to the second request using a semantic knowledge graph. The method also includes generating a customized digital activity based on the user profile and determined intended transaction. The method further includes generating for display the customized digital activity on the user device.
    Type: Application
    Filed: January 7, 2021
    Publication date: July 7, 2022
    Inventors: Byung Chun, Lincoln Roach, Christopher Yu, Divya Mahajan, Benjamin Dixon
  • Publication number: 20190287017
    Abstract: A method for database management is disclosed. The method may include receiving an algorithm from a user. Based on the algorithm, a hierarchical dataflow graph (hDFG) may be generated. The method may further include generating an architecture for a chip based on the hDFG. The architecture for a chip may retrieve a data table from a database. The data table may be associated with the architecture for a chip. Finally, the algorithm may be executed against the data table, such that an action included in the algorithm is performed.
    Type: Application
    Filed: March 15, 2019
    Publication date: September 19, 2019
    Inventors: Hadi Esmaeilzadeh, V, Divya Mahajan, Joon Kyun Kim