Abstract: A method includes forming a gate over a substrate having a semiconductor layer comprising silicon. The gate has a sidewall spacer on sides of the gate. The gate has a gate length less than or equal to 50 nanometers. The gate is formed of polysilicon. A cobalt layer is formed on a top of the gate and the sidewall spacer. A titanium nitride layer is formed on the cobalt layer. The titanium nitride layer has a thickness over the gate in a range of 10 to 14 nanometers. An anneal is performed to form a cobalt silicide layer on the top of the gate and leave cobalt on the sidewall spacer. An etchant is applied that etches cobalt and titanium nitride selective to cobalt silicide to the titanium nitride layer. The cobalt is on the sidewall spacer and the cobalt silicide layer. An anneal is performed to increase conductivity of the cobalt silicide layer.