Patents by Inventor Dmitri Lapanik

Dmitri Lapanik has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12169394
    Abstract: A method of optimizing execution of a control function on a control system including a plurality of hardware components includes: determining a processing capability and a communication capability of each of the plurality of hardware components; generating a plurality of solutions for executing the control function using the plurality of hardware components based on a processing capability and a communication capability of each of the plurality of hardware components; scoring the plurality of generated solutions based on a desirability of each solution; selecting a solution having a highest desirability score; and controlling the control system to execute the control function based on the selected solution.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: December 17, 2024
    Assignee: WOVEN BY TOYOTA, INC.
    Inventors: Jean-Francois Bastien, Dmitri Lapanik
  • Publication number: 20230350354
    Abstract: A method of optimizing execution of a control function on a control system including a plurality of hardware components includes: determining a processing capability and a communication capability of each of the plurality of hardware components; generating a plurality of solutions for executing the control function using the plurality of hardware components based on a processing capability and a communication capability of each of the plurality of hardware components; scoring the plurality of generated solutions based on a desirability of each solution; selecting a solution having a highest desirability score; and controlling the control system to execute the control function based on the selected solution.
    Type: Application
    Filed: April 28, 2022
    Publication date: November 2, 2023
    Applicant: WOVEN BY TOYOTA, INC.
    Inventors: Jean-Francois BASTIEN, Dmitri Lapanik
  • Publication number: 20140011124
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicant: D2S, INC.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Patent number: 8533640
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Grant
    Filed: September 8, 2012
    Date of Patent: September 10, 2013
    Assignee: D2S, Inc.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Publication number: 20130007675
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Application
    Filed: September 8, 2012
    Publication date: January 3, 2013
    Applicant: D2S, INC.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Patent number: 8078997
    Abstract: Various embodiments of the present invention are generally directed to a method, system, and computer program product for implementing direct measurement model with simulation and calibration of manufacturing process model in the manufacturing of precision devices such as electronic integrated circuits. The method and the system determine the measured measurement result and the direct measurement information and compare the direct measurement information against the other to determine whether to adjust the process models and the empirical parameters thereof.
    Type: Grant
    Filed: December 28, 2007
    Date of Patent: December 13, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventor: Dmitri Lapanik
  • Publication number: 20110265049
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Application
    Filed: July 1, 2011
    Publication date: October 27, 2011
    Applicant: D2S, INC.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Publication number: 20100229148
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Application
    Filed: May 18, 2010
    Publication date: September 9, 2010
    Applicant: D2S, INC.
    Inventors: Dmitri Lapanik, Shoei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Patent number: 7777204
    Abstract: A system and method for improved electron beam writing that is capable of taking design intent, equipment capability and design requirements into consideration. The system and method determines an optimal writing pattern based, at least in part, on the received information.
    Type: Grant
    Filed: November 30, 2006
    Date of Patent: August 17, 2010
    Assignee: Cadence Design Systems, Inc.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Patent number: 7747977
    Abstract: Various embodiments of the present invention relate to particle beam writing to fabricate an integrated circuit on a wafer. In various embodiments, cell projection (CP) cell library information is stored in the form of a data structure. Subsequently, the CP cell library information is referenced by a writing system. The patterns are written on the wafer depending on the referenced CP cell library.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: June 29, 2010
    Assignee: D2S, Inc.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu
  • Publication number: 20090172616
    Abstract: Various embodiments of the present invention are generally directed to a method, system, and computer program product for implementing direct measurement model with simulation and calibration of manufacturing process model in the manufacturing of precision devices such as electronic integrated circuits. The method and the system determine the measured measurement result and the direct measurement information and compare the direct measurement information against the other to determine whether to adjust the process models and the empirical parameters thereof.
    Type: Application
    Filed: December 28, 2007
    Publication date: July 2, 2009
    Applicant: CADENCE DESIGN SYSTEMS, INC.
    Inventor: Dmitri Lapanik
  • Publication number: 20070125967
    Abstract: A system and method for improved electron beam writing that is capable of taking design intent, equipment capability and design requirements into consideration. The system and method determines an optimal writing pattern based, at least in part, on the received information.
    Type: Application
    Filed: November 30, 2006
    Publication date: June 7, 2007
    Applicant: Cadence Design Systems, Inc.
    Inventors: Dmitri Lapanik, Shohei Matsushita, Takashi Mitsuhashi, Zhigang Wu