Abstract: The disclosure describes various aspects of techniques for optimal fault-tolerant implementations of controlled-Z? gates and Heisenberg interactions. Improvements in the implementation of the controlled-Z? gate can be made by using a clean ancilla and in-circuit measurement. Various examples are described that depend on whether the implementation is with or without measurement and feedforward. The implementation of the Heisenberg interaction can leverage the improved controlled-Z? gate implementation. These implementations can cut down significantly the implementation costs associated with fault-tolerant quantum computing systems.

Abstract: A repository is configured in a hybrid data processing environment comprising a classical computing system and a quantum computing system, to hold a plurality of quantum circuit components (QCC(s)). A degree of difficulty in simulating the received QCC in the classical computing system is transformed into a classical hardness score. A degree of difficulty in implementing the received QCC in the quantum computing system is transformed into a quantum hardness score. A first parameter in a metadata data structure associated with the received QCC is populated with the classical hardness score. A second parameter in the metadata data structure associated with the received QCC is populated with the quantum hardness score. The received QCC is transformed into a library element by at least augmenting the received QCC with the metadata data structure. The library element is added to the repository.

Abstract: Systems and techniques that facilitate partitioned template matching and/or symbolic peephole optimization are provided. In various embodiments, a system can comprise a template component, which can perform template matching on a Clifford circuit associated with a set of qubits. In various aspects, the system can comprise a partition component, which can partition, prior to the template matching, the Clifford circuit into a computation stage, a Pauli stage, and a SWAP stage. In various instances, the template matching can be performed on the computation stage. In various embodiments, the system can comprise a symbolic component, which can select a subset of qubits from the set of qubits, rewrite at least one entangling gate in the computation stage such that a target of the at least one entangling gate is in the subset of qubits, and replace the at least one rewired entangling gate with a symbolic Pauli gate.

Abstract: According to an embodiment of the present invention, a method, system, and computer program product for reducing and performing quantum circuits. The Embodiment may include receiving, by a classical computer, a quantum circuit comprising a CZ layer and a CNOT layer. The Embodiment may include creating, by a classical computer, a modified quantum circuit based on the CZ layer and the CNOT layer, wherein the modified quantum circuit includes phase gates with CNOT gates that perform similar functions of the CZ gates in the CZ layer. The embodiment may include performing, on a quantum computer, the modified quantum circuit. The embodiment may reduce the depth of a quantum circuit, thereby enabling faster and more accurate computation of the quantum circuit.

Abstract: Systems, computer-implemented methods, and computer program products to facilitate synthesis of a quantum circuit are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a circuit generation component that generates, iteratively, quantum circuits from 1 to N two-qubit gates, wherein at least one or more iterations (1, 2, . . . , N) adds a single two-qubit gate to circuits from a previous iteration based on using added single 2-qubit gates that represent operations distinct from previous operations relative to previous iterations. The computer executable components can further comprise a circuit identification component that identifies, from the quantum circuits, a desired circuit that matches a quantum circuit representation.

Abstract: Techniques for enhancing quantum circuit execution in a quantum service are presented. Database component stores compiled unitaries associated with quantum functions. Unitary management component (UMC) determines whether to compile a unitary associated with a quantum function for storage in the database component based on a composite quality score associated with the unitary and a threshold composite quality score associated with the quantum function, wherein the threshold score can be, or can be based on, a composite quality score of a compiled unitary that performs the same quantum function or a compiled unitary that performs a different quantum function. UMC determines the composite quality score based on a group of factors comprising frequency of utilizing the quantum function or equivalent quantum function or computation, age of the quantum function or computation, difficulty level of compiling a unitary, quantum circuit quality, or error associated with experimental execution of the quantum function.

Abstract: The disclosure describes various aspects related to enabling effective multi-qubit operations, and more specifically, to techniques for enabling parallel multi-qubit operations on a universal ion trap quantum computer. In an aspect, a method of performing quantum operations in an ion trap quantum computer or trapped-ion quantum system includes implementing at least two parallel gates of a quantum circuit, each of the at least two parallel gates is a multi-qubit gate, each of the at least two parallel gates is implemented using a different set of ions of a plurality of ions in a ion trap, and the plurality of ions includes four or more ions. The method further includes simultaneously performing operations on the at least two parallel gates as part of the quantum operations. A trapped-ion quantum system and a computer-readable storage medium corresponding to the method described above are also disclosed.

Abstract: The disclosure describes various aspects of techniques for optimal fault-tolerant implementations of controlled-Za gates and Heisenberg interactions. Improvements in the implementation of the controlled-Za gate can be made by using a clean ancilla and in-circuit measurement. Various examples are described that depend on whether the implementation is with or without measurement and feedforward. The implementation of the Heisenberg interaction can leverage the improved controlled-Za gate implementation. These implementations can cut down significantly the implementation costs associated with fault-tolerant quantum computing systems.

Abstract: A method of generating a randomized benchmarking protocol includes providing a randomly generated plurality of Hadamard gates; applying the Hadamard gates to a plurality of qubits; and generating randomly a plurality of Hadamard-free Clifford circuits. Each of the plurality of Hadamard-free Clifford circuits is generated by at least randomly generating a uniformly distributed phase (P) gate, and randomly generating a uniformly distributed linear Boolean invertible matrix of conditional NOT (CNOT) gate, and combining the P and CNOT gates to form each of the plurality of Hadamard-free Clifford circuits. The method also includes combining each of the plurality of Hadamard-free Clifford circuits with corresponding each of the plurality of Hadamard gates to form a sequence of alternating Hadamard-free Clifford-Hadamard pairs circuit to form the randomized benchmarking protocol; and measuring noise in a quantum mechanical processor using the randomized benchmarking protocol.

Abstract: The disclosure describes various aspects related to enabling effective multi-qubit operations, and more specifically, to techniques for enabling parallel multi-qubit operations on a universal ion trap quantum computer. In an aspect, a method of performing quantum operations in an ion trap quantum computer or trapped-ion quantum system includes implementing at least two parallel gates of a quantum circuit, each of the at least two parallel gates is a multi-qubit gate, each of the at least two parallel gates is implemented using a different set of ions of a plurality of ions in a ion trap, and the plurality of ions includes four or more ions. The method further includes simultaneously performing operations on the at least two parallel gates as part of the quantum operations. A trapped-ion quantum system and a computer-readable storage medium corresponding to the method described above are also disclosed.

Abstract: One or more systems, computer-implemented methods and/or computer program products provided herein relate to obfuscating an input specification of a quantum circuit, one or more gate parameters of a quantum circuit, and/or at least a portion of a quantum circuit. A system can comprise a processor, operatively coupled to a memory, wherein the processor executes the following computer executable components: an obfuscation component that encodes an original quantum control computation by introducing a specified variable into the original quantum control computation, wherein the introduction of the specified variable creates an encoded quantum control computation that is decodable by performing a quantum compiling operation on the encoded quantum control computation.

Abstract: Systems, computer-implemented methods, and computer program products to facilitate synthesis of a quantum circuit are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a circuit generation component that generates, iteratively, quantum circuits from 1 to N two-qubit gates, wherein at least one or more iterations (1, 2, . . . , N) adds a single two-qubit gate to circuits from a previous iteration based on using added single 2-qubit gates that represent operations distinct from previous operations relative to previous iterations. The computer executable components can further comprise a circuit identification component that identifies, from the quantum circuits, a desired circuit that matches a quantum circuit representation.

Abstract: A method of generating a randomized benchmarking protocol includes providing a randomly generated plurality of Hadamard gates; applying the Hadamard gates to a plurality of qubits; and generating randomly a plurality of Hadamard-free Clifford circuits. Each of the plurality of Hadamard-free Clifford circuits is generated by at least randomly generating a uniformly distributed phase (P) gate, and randomly generating a uniformly distributed linear Boolean invertible matrix of conditional NOT (CNOT) gate, and combining the P and CNOT gates to form each of the plurality of Hadamard-free Clifford circuits. The method also includes combining each of the plurality of Hadamard-free Clifford circuits with corresponding each of the plurality of Hadamard gates to form a sequence of alternating Hadamard-free Clifford-Hadamard pairs circuit to form the randomized benchmarking protocol; and measuring noise in a quantum mechanical processor using the randomized benchmarking protocol.

Abstract: Systems, computer-implemented methods, and computer program products to facilitate synthesis of a quantum circuit are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a circuit generation component that generates, iteratively, quantum circuits from 1 to N two-qubit gates, wherein at least one or more iterations (1, 2, . . . , N) adds a single two-qubit gate to circuits from a previous iteration based on using added single 2-qubit gates that represent operations distinct from previous operations relative to previous iterations. The computer executable components can further comprise a circuit identification component that identifies, from the quantum circuits, a desired circuit that matches a quantum circuit representation.

Abstract: The disclosure describes the implementation of automated techniques for optimizing quantum circuits of the size and type expected in quantum computations that outperform classical computers. The disclosure shows how to handle continuous gate parameters and report a collection of fast algorithms capable of optimizing large-scale-scale quantum circuits. For the suite of benchmarks considered, the techniques described obtain substantial reductions in gate counts. In particular, the techniques in this disclosure provide better optimization in significantly less time than previous approaches, while making minimal structural changes so as to preserve the basic layout of the underlying quantum algorithms.

Abstract: A method of generating a random uniformly distributed Clifford unitary circuit (C) includes: generating a random Hadamard (H) gate; drawing a plurality of qubits from a probability distribution of qubits; applying the random H gate to the plurality of qubits drawn from the probability distribution; and generating randomly a first Hadamard-free Clifford circuit (F1) and a second Hadamard-free Clifford circuit (F2). The first and second Hadamard-free Clifford circuits is generated by at least randomly generating a uniformly distributed phase (P) gate, and randomly generating a uniformly distributed linear Boolean invertible conditional NOT (CNOT) gate, and combining the P and CNOT gates to form the first and second Hadamard-free Clifford circuits. The method further includes combining the generated first Hadamard-free circuit (F1) and the second Hadamard-free Clifford circuit (F2) with the generated random Hadamard (H) gate to form the random uniformly distributed Clifford unitary circuit (C).

Abstract: The disclosure describes various aspects of techniques for using global interactions in efficient quantum circuit constructions. More specifically, this disclosure describes ways to use a global entangling operator to efficiently implement circuitry common to a selection of important quantum algorithms. The circuits may be constructed with global Ising entangling gates (e.g., global Mølmer-Sørenson gates or GMS gates) and arbitrary addressable single-qubit gates. Examples of the types of circuits that can be implemented include stabilizer circuits, Toffoli-4 gates, Toffoli-n gates, quantum Fourier transformation (QTF) circuits, and quantum Fourier adder (QFA) circuits. In certain instances, the use of global operations can substantially improve the entangling gate count.

Abstract: A method of generating a randomized benchmarking protocol includes providing a randomly generated plurality of Hadamard gates; applying the Hadamard gates to a plurality of qubits; and generating randomly a plurality of Hadamard-free Clifford circuits. Each of the plurality of Hadamard-free Clifford circuits is generated by at least randomly generating a uniformly distributed phase (P) gate, and randomly generating a uniformly distributed linear Boolean invertible matrix of conditional NOT (CNOT) gate, and combining the P and CNOT gates to form each of the plurality of Hadamard-free Clifford circuits. The method also includes combining each of the plurality of Hadamard-free Clifford circuits with corresponding each of the plurality of Hadamard gates to form a sequence of alternating Hadamard-free Clifford-Hadamard pairs circuit to form the randomized benchmarking protocol; and measuring noise in a quantum mechanical processor using the randomized benchmarking protocol.

Abstract: A repository is configured in a hybrid data processing environment comprising a classical computing system and a quantum computing system, to hold a plurality of quantum circuit components (QCC(s)). A degree of difficulty in simulating the received QCC in the classical computing system is transformed into a classical hardness score. A degree of difficulty in implementing the received QCC in the quantum computing system is transformed into a quantum hardness score. A first parameter in a metadata data structure associated with the received QCC is populated with the classical hardness score. A second parameter in the metadata data structure associated with the received QCC is populated with the quantum hardness score. The received QCC is transformed into a library element by at least augmenting the received QCC with the metadata data structure. The library element is added to the repository.

Abstract: Systems and techniques that facilitate partitioned template matching and/or symbolic peephole optimization are provided. In various embodiments, a system can comprise a template component, which can perform template matching on a Clifford circuit associated with a set of qubits. In various aspects, the system can comprise a partition component, which can partition, prior to the template matching, the Clifford circuit into a computation stage, a Pauli stage, and a SWAP stage. In various instances, the template matching can be performed on the computation stage. In various embodiments, the system can comprise a symbolic component, which can select a subset of qubits from the set of qubits, rewrite at least one entangling gate in the computation stage such that a target of the at least one entangling gate is in the subset of qubits, and replace the at least one rewired entangling gate with a symbolic Pauli gate.