Patents by Inventor Dmitry Bavinov

Dmitry Bavinov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Non-volatile memory program algorithm device and method
    Patent number: 9431126
    Abstract: A non-volatile memory device and method for programming cells using repeated pulses of program voltages, with interleaved read operations to determine the level of read current, until the desired programming state is achieved. Each successive program pulse has one or more program voltages increased by a step value relative to the previous pulse. For a single level cell type, each cell is individually removed from the programming pulses after reaching a first read current threshold, and the step value is increased for one or more kicker pulses thereafter. For a multi-level cell type, the step value drops after one of the cells reaches a first read current threshold, some cells are individually removed from the programming pulses after reaching a second read current threshold while others are individually removed from the programming pulses after reaching a third read current threshold.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: August 30, 2016
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Xian Liu, James Cheng, Dmitry Bavinov, Alexander Kotov, Jong-Won Yoo
  • Non-volatile memory program algorithm device and method
    Patent number: 9293217
    Abstract: A non-volatile memory device and method for programming cells using repeated pulses of program voltages, with interleaved read operations to determine the level of read current, until the desired programming state is achieved. Each successive program pulse has one or more program voltages increased by a step value relative to the previous pulse. For a single level cell type, each cell is individually removed from the programming pulses after reaching a first read current threshold, and the step value is increased for one or more kicker pulses thereafter. For a multi-level cell type, the step value drops after one of the cells reaches a first read current threshold, some cells are individually removed from the programming pulses after reaching a second read current threshold while others are individually removed from the programming pulses after reaching a third read current threshold.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: March 22, 2016
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Xian Liu, James Cheng, Dmitry Bavinov, Alexander Kotov, Jong-Won Yoo
  • Non-volatile memory program algorithm device and method
    Patent number: 9123431
    Abstract: A non-volatile memory device and method for programming cells using repeated pulses of program voltages, with interleaved read operations to determine the level of read current, until the desired programming state is achieved. Each successive program pulse has one or more program voltages increased by a step value relative to the previous pulse. For a single level cell type, each cell is individually removed from the programming pulses after reaching a first read current threshold, and the step value is increased for one or more kicker pulses thereafter. For a multi-level cell type, the step value drops after one of the cells reaches a first read current threshold, some cells are individually removed from the programming pulses after reaching a second read current threshold while others are individually removed from the programming pulses after reaching a third read current threshold.
    Type: Grant
    Filed: March 14, 2014
    Date of Patent: September 1, 2015
    Assignee: Silicon Storage Technology, Inc.
    Inventors: Xian Liu, James Cheng, Dmitry Bavinov, Alexander Kotov, Jong-Won Yoo
  • Non-volatile Memory Program Algorithm Device And Method
    Publication number: 20140269058
    Abstract: A non-volatile memory device and method for programming cells using repeated pulses of program voltages, with interleaved read operations to determine the level of read current, until the desired programming state is achieved. Each successive program pulse has one or more program voltages increased by a step value relative to the previous pulse. For a single level cell type, each cell is individually removed from the programming pulses after reaching a first read current threshold, and the step value is increased for one or more kicker pulses thereafter. For a multi-level cell type, the step value drops after one of the cells reaches a first read current threshold, some cells are individually removed from the programming pulses after reaching a second read current threshold while others are individually removed from the programming pulses after reaching a third read current threshold.
    Type: Application
    Filed: March 14, 2014
    Publication date: September 18, 2014
    Applicant: Silicon Storage Technology, Inc.
    Inventors: Xian Liu, James Cheng, Dmitry Bavinov, Alexander Kotov, Jong-Won Yoo