Patents by Inventor Dmitry Felsenstein

Dmitry Felsenstein has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • APPARATUS, SYSTEM, AND METHOD OF CURRENT CONSUMPTION ADJUSTMENT
    Publication number: 20250062610
    Abstract: For example, a current consumption adjuster may be configured to adjust a current consumption from a power supply of an integrated circuit. For example, the current consumption adjuster may include a controllable load circuitry to controllably apply one or more loads to the power supply of the integrated circuit. For example, the current consumption adjuster may include a controller configured to identify a current consumption event including a transition of a current consumption of the integrated circuit from the power supply. For example, the controller may be configured to control activation of the controllable load circuitry to apply an event-based load to the power supply, for example, based on the current consumption event.
    Type: Application
    Filed: December 28, 2023
    Publication date: February 20, 2025
    Applicant: INTEL CORPORATION
    Inventors: Harel Aronheim, Dmitry Felsenstein, Ariel Wolf, Eran Amir, Ofir Klein, Yazan Alwilly, Sergey Sofer, Sagi Belizowski
  • Time encoded data communication protocol, apparatus and method for generating and receiving a data signal
    Patent number: 11979177
    Abstract: An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: May 7, 2024
    Assignee: Intel Corporation
    Inventors: Elan Banin, Eytan Mann, Rotem Banin, Ronen Gernizky, Ofir Degani, Igal Kushnir, Shahar Porat, Amir Rubin, Vladimir Volokitin, Elinor Kashani, Dmitry Felsenstein, Ayal Eshkoli, Tal Davidson, Eng Hun Ooi, Yossi Tsfati, Ran Shimon
  • Time encoded data communication protocol, apparatus and method for generating and receiving a data signal
    Publication number: 20230090431
    Abstract: An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.
    Type: Application
    Filed: July 6, 2022
    Publication date: March 23, 2023
    Inventors: Elan BANIN, Eytan MANN, Rotem BANIN, Ronen GERNIZKY, Ofir DEGANI, Igal KUSHNIR, Shahar PORAT, Amir RUBIN, Vladimir VOLOKITIN, Elinor KASHANI, Dmitry FELSENSTEIN, Ayal ESHKOLI, Tal DAVIDSON, Eng Hun OOI, Yossi TSFATI, Ran SHIMON
  • Time encoded data communication protocol, apparatus and method for generating and receiving a data signal
    Patent number: 11387852
    Abstract: An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.
    Type: Grant
    Filed: September 17, 2018
    Date of Patent: July 12, 2022
    Assignee: Intel Corporation
    Inventors: Elan Banin, Eytan Mann, Rotem Banin, Ronen Gernizky, Ofir Degani, Igal Kushnir, Shahar Porat, Amir Rubin, Vladimir Volokitin, Elinor Kashani, Dmitry Felsenstein, Ayal Eshkoli, Tai Davidson, Eng Hun Ooi, Yossi Tsfati, Ran Shimon
  • Time encoded data communication protocol, apparatus and method for generating and receiving a data signal
    Publication number: 20200212943
    Abstract: An apparatus for generating a data signal comprises a processing circuit configured to generate the data signal, the data signal comprising a sequence of a first signal edge of a first type, a second signal edge of a second type, and a third signal edge of the first type, the first signal edge and the second signal edge being separated by a first time period corresponding to first data to be transmitted, and the second signal edge and the third signal edge being separated by a second time period corresponding to second data to be transmitted. An output interface circuit is configured to output the data signal.
    Type: Application
    Filed: September 17, 2018
    Publication date: July 2, 2020
    Inventors: Elan Banin, Eytan Mann, Rotem Banin, Ronen Gernizky, Ofir Degani, Igal Kushnir, Shahar Porat, Amir Rubin, Vladimir Volokitin, Elinor Kashani, Dmitry Felsenstein, Ayal Eshkoli, Tal Davidson, Eng Hun Ooi, Yossi Tsfati, Ran Shimon