Abstract: An image processing system comprises an image processor configured to construct a designated functional based on a plurality of functions each associated with a corresponding portion of image information relating to at least first and second images, and to generate a target image utilizing the constructed functional. For example, the functions may comprise a set of functions ƒ1(A1), ƒ1(A1), . . . , ƒ1(A1) of pixels from respective input images A1, A2, AL of the image information, and the functional may be a function F(X) of the set of functions ƒ1,(A1) ƒ2(AL), ƒL(AL) where X denotes the target image and is generated by minimizing the functional F(X). The input images may be received from one or more image sources and the target image may be provided to one or more image destinations.

Abstract: An image processing system comprises an image processor configured to identify edges in an image, to apply a first type of filtering operation to portions of the image associated with the edges, and to apply a second type of filtering operation to one or more other portions of the image. By way of example only, in a given embodiment a clustering operation is applied to the image to identify a plurality of clusters, a first set of edges comprising edges of the clusters is identified, an edge detection operation is applied to the image to identify a second set of edges, a third set of edges is identified based on the first and second sets of edges, and the first type of filtering operation is applied to portions of the image associated with one or more edges of the third set of edges.

Abstract: An image processing system comprises an image processor configured to obtain a first image stream having a first frame rate and a second image stream having a second frame rate lower than the first frame rate, to recover additional frames for the second image stream based on existing frames of the first and second image streams, and to utilize the additional frames to provide an increased frame rate for the second image stream. Recovering additional frames for the second image stream based on existing frames of the first and second image streams illustratively comprises determining sets of one or more additional frames for insertion between respective pairs of consecutive existing frames in the second image stream in respective iterations.

Abstract: An image processing system comprises an image processor configured to perform first and second edge detection operations on respective first and second images to obtain respective first and second edge images, to apply a joint edge weighting operation using edges from the first and second edge images, to generate an edge mask based on results of the edge weighting operation, to utilize the edge mask to obtain a third edge image, and to generate a third image based on the third edge image. By way of example only, in a given embodiment the first image may comprise a first depth image generated by a depth imager, the second image may comprise a two-dimensional image of substantially the same scene as the first image, and the third image may comprise an enhanced depth image having enhanced edge quality relative to the first depth image.

Abstract: An image processing system comprises an image processor having image processing circuitry and an associated memory. The image processor is configured to implement a gesture recognition system comprising a static pose recognition module. The static pose recognition module is configured to identify a hand region of interest in at least one image, to extract a contour of the hand region of interest, to compute a feature vector based at least in part on the extracted contour, and to recognize a static pose of the hand region of interest utilizing a dynamic warping operation based at least in part on the feature vector.

Abstract: An image processing system comprises an image processor configured to identify edges in an image, to apply a first type of filtering operation to portions of the image associated with the edges, and to apply a second type of filtering operation to one or more other portions of the image. By way of example only, in a given embodiment a clustering operation is applied to the image to identify a plurality of clusters, a first set of edges comprising edges of the clusters is identified, an edge detection operation is applied to the image to identify a second set of edges, a third set of edges is identified based on the first and second sets of edges, and the first type of filtering operation is applied to portions of the image associated with one or more edges of the third set of edges.

Abstract: An image processing system comprises an image processor configured to construct a designated functional based on a plurality of functions each associated with a corresponding portion of image information relating to at least first and second images, and to generate a target image utilizing the constructed functional. For example, the functions may comprise a set of functions f1(A1), f1(A1), . . . , f1(A1) of pixels from respective input images A1, A2, AL of the image information, and the functional may be a function F(X) of the set of functions f1,(A1) f2(AL), fL(AL) where X denotes the target image and is generated by minimizing the functional F(X). The input images may be received from one or more image sources and the target image may be provided to one or more image destinations.

Abstract: An image processing system comprises an image processor configured to perform first and second edge detection operations on respective first and second images to obtain respective first and second edge images, to apply a joint edge weighting operation using edges from the first and second edge images, to generate an edge mask based on results of the edge weighting operation, to utilize the edge mask to obtain a third edge image, and to generate a third image based on the third edge image. By way of example only, in a given embodiment the first image may comprise a first depth image generated by a depth imager, the second image may comprise a two-dimensional image of substantially the same scene as the first image, and the third image may comprise an enhanced depth image having enhanced edge quality relative to the first depth image.

Abstract: An image processing system comprises an image processor having image processing circuitry and an associated memory. The image processor is configured to implement a gesture recognition system comprising a static pose recognition module. The static pose recognition module is configured to identify a hand region of interest in at least one image, to perform a skeletonization operation on the hand region of interest, to determine a main direction of the hand region of interest utilizing a result of the skeletonization operation, to perform a scanning operation on the hand region of interest utilizing the determined main direction to estimate a plurality of hand features that are substantially invariant to hand orientation, and to recognize a static pose of the hand region of interest based on the estimated hand features.

Abstract: An image processing system comprises an image processor configured to establish a main processing thread and a parallel processing thread for respective portions of a multithreaded gesture recognition process. The parallel processing thread is configured to utilize buffer circuitry of the image processor, such as one or more double buffers of the buffer circuitry, so as to permit the parallel processing thread to run asynchronously to the main processing thread. The parallel processing thread implements one of noise estimation, background estimation and static hand pose recognition for the multithreaded gesture recognition process. Additional processing threads may be established to run in parallel with the main processing thread. For example, the image processor may establish a first parallel processing thread implementing the noise estimation, a second parallel processing thread implementing the background estimation, and a third parallel processing thread implementing the static hand pose recognition.

Abstract: An image processing system comprises an image processor having image processing circuitry and an associated memory. The image processor is configured to implement a gesture recognition system comprising a static pose recognition module. The static pose recognition module is configured to identify a region of interest in at least one image, to represent the region of interest as a segmented region of interest comprising a union of segment sets from respective ones of a plurality of lines, to estimate features of the segmented region of interest, and to recognize a static pose of the segmented region of interest based on the estimated features. The lines from which the respective segment sets are taken illustratively comprise respective parallel lines configured as one of horizontal lines, vertical lines and rotated lines. A given one of the segments in one of the sets may be represented by a pair of segment coordinates.

Abstract: An image processing system comprises an image processor configured to identify a plurality of candidate boundaries in an image, to obtain corresponding modified images for respective ones of the candidate boundaries, to apply a mapping function to each of the modified images to generate a corresponding vector, to determine sets of estimates for respective ones of the vectors relative to designated class parameters, and to select a particular one of the candidate boundaries based on the sets of estimates. The designated class parameters may include sets of class parameters for respective ones of a plurality of classes each corresponding to a different gesture to be recognized. The candidate boundaries may comprise candidate palm boundaries associated with a hand in the image. The image processor may be further configured to select a particular one of the plurality of classes to recognize the corresponding gesture based on the sets of estimates.

Abstract: A method for double precision approximation of a single precision operation is disclosed. The method may include steps (A) to (B). Step (A) may store an input value in a processor. The processor generally implements a plurality of first operations in hardware. Each first operation may receive a first variable as an argument. The first variable may be implemented in a fixed point format at a single precision. The input value may be implemented in the fixed point format at a double precision. Step (B) may generate an output value by emulating a selected one of the first operations using the input value as the argument. The emulation may utilize the selected first operation in hardware. The output value may be implemented in the fixed point format at the double precision. The emulation is generally performed by a plurality of instructions executed by the processor.

Abstract: An image processing system comprises an image processor configured to obtain a first image stream having a first frame rate and a second image stream having a second frame rate lower than the first frame rate, to recover additional frames for the second image stream based on existing frames of the first and second image streams, and to utilize the additional frames to provide an increased frame rate for the second image stream. Recovering additional frames for the second image stream based on existing frames of the first and second image streams illustratively comprises determining sets of one or more additional frames for insertion between respective pairs of consecutive existing frames in the second image stream in respective iterations.

Abstract: An image processing system comprises an image processor configured to identify one or more potentially defective pixels associated with at least one depth artifact in a first image, and to apply a super resolution technique utilizing a second image to reconstruct depth information of the one or more potentially defective pixels. Application of the super resolution technique produces a third image having the reconstructed depth information. The first image may comprise a depth image and the third image may comprise a depth image corresponding generally to the first image but with the depth artifact substantially eliminated. An additional super resolution technique may be applied utilizing a fourth image. Application of the additional super resolution technique produces a fifth image having increased spatial resolution relative to the third image.

Abstract: An apparatus generally having a first circuit and a second circuit is disclosed. The first circuit may be configured to synthesize a first vector by filtering a second vector based on a third vector. The second circuit may be configured to (i) generate a gain corresponding to a fourth vector, (ii) compare the gain to a plurality of thresholds and (iii) update the third vector as a function of the gain where the compare determines that the gain is not between the thresholds. The fourth vector may be received from a network as an echo of the second vector.

Abstract: An apparatus generally having a first circuit and a second circuit is disclosed. The first circuit may be configured to generate a first sample by filtering an input vector based on (a) a filter vector and (b) a stochastic vector. Each of a plurality of components in the stochastic vector generally has a respective random value. The first circuit may also be configured to generate a second sample as a difference between a third sample and the first sample. The third sample may be received from a network as an echo. The second circuit may be configured to update a subset of a plurality of taps of the filtering where a corresponding one of the components of the stochastic vector has a first value of the random values.

Abstract: In one embodiment, a simulator, e.g., for a hard-disk drive selects for testing a signal-to-noise ratio (SNR) value from a range of ratios and an error-correction codeword pattern from a range of codeword patterns. The simulator simulates a communications channel by applying write noise, inter-symbol interference, and read noise to the codeword pattern to generate a noisy signal. In addition, the simulator adds arbitrary-noise to the codeword to accelerate the speed of the simulation. The arbitrary noise increases the probability of converging on a trapping set and does not represent any noise introduced by the communications channel. The simulator attempts to decode the noisy signal, and if decoding is unsuccessful, then the simulator increments an error counter corresponding to the selected signal-to-noise ratio. This process is repeated for all possible combinations of signal-to-noise ratio values and codeword patterns to determine the error rate for all of the signal-to-noise ratio values.

Abstract: An apparatus generally having a first circuit and a second circuit is disclosed. The first circuit may be configured to synthesize a first vector by filtering a second vector based on a third vector. The second circuit may be configured to (i) generate a gain corresponding to a fourth vector, (ii) compare the gain to a plurality of thresholds and (iii) update the third vector as a function of the gain where the compare determines that the gain is not between the thresholds. The fourth vector may be received from a network as an echo of the second vector.

Abstract: A method for double precision approximation of a single precision operation is disclosed. The method may include steps (A) to (B). Step (A) may store an input value in a processor. The processor generally implements a plurality of first operations in hardware. Each first operation may receive a first variable as an argument. The first variable may be implemented in a fixed point format at a single precision. The input value may be implemented in the fixed point format at a double precision. Step (B) may generate an output value by emulating a selected one of the first operations using the input value as the argument. The emulation may utilize the selected first operation in hardware. The output value may be implemented in the fixed point format at the double precision. The emulation is generally performed by a plurality of instructions executed by the processor.