Abstract: The present disclosure provides embodiments for simulating a quantum circuit. In particular, an indication of a subset of input and output qubits of the quantum circuit is received. The indicated subset corresponds to an amplitude tensor of the quantum circuit that is to be determined, wherein the amplitude tensor comprises amplitudes for different combinations of states of the qubits of the indicated subset. Using a tensor network of the quantum circuit and Restricted Maximum Cardinality Search, RMCS, an elimination order of intermediate qubits within the quantum circuit is determined. The amplitude tensor is determined by removing, successively in accordance with the elimination order, that indices of the tensors of the tensor network that correspond to the intermediate qubits from the tensor network.

Abstract: A device for a quantum circuit simulator and a quantum circuit simulator including at least one such device are provided. The device is configured to: obtain a first sequence of quantum gates; generate a second sequence of quantum gates, as a sub-sequence of the first sequence of quantum gates; calculate a local and a global qubits set based on the second sequence of quantum gates; generate a set of clusters of quantum gates, each cluster including a subset of the quantum gates of the second sequence of quantum gates merged together using a greedy algorithm; generate a third sequence of quantum gates, which contains all quantum gates from the second sequence of quantum gates, according to an order of the clusters; provide the local qubits set and the global qubits set to the quantum circuit simulator; and output the third sequence of quantum gates to the quantum circuit simulator.