Patents by Inventor Dmitry Veinger

Dmitry Veinger has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250130213
    Abstract: A sensing device that includes (a) an image sensor matrix that comprises a first pixel and a second pixel; wherein the first pixel is configured to generate a first detection signal indicative of a presence of a first analyte; wherein the second pixel is configured to generate a second detection signal that is indifferent to the presence of the first analyte; and (b) a processing circuit that is configured to determine the presence of the first analyte based on at least a relationship between the first detection signal and the second detection signal.
    Type: Application
    Filed: August 29, 2024
    Publication date: April 24, 2025
    Applicants: Tower Semiconductor Ltd., Fraunhofer Gesellschaft zur Förderung der Angewandten Forschung
    Inventors: Ruth Shima Edelstein, Dmitry Ivanov, Dmitry Veinger, Yakov Roizin, Sonja Hoffmann, Michael Henfling, Sabine Trupp
  • Patent number: 9231020
    Abstract: Some demonstrative embodiments include devices and/or methods of gettering on silicon on insulator (SOI) substrate. For example, a complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) may include a plurality of pixels arranged on a wafer, a pixel of the pixels including: a silicon active area; at least one non-silicided leakage-sensitive component formed on the active area, the leakage-sensitive component is sensitive to metal contaminants; a non-leakage-sensitive area formed on the active area, the non-leakage-sensitive area surrounding the leakage-sensitive component; and at least one silicided gettering region formed on the non-leakage-sensitive area to trap the metal contaminants.
    Type: Grant
    Filed: January 16, 2014
    Date of Patent: January 5, 2016
    Assignee: TOWER SEMICONDUCTOR LTD.
    Inventors: Dmitry Veinger, Assaf Lahav, Omer Katz, Ruthie Shima-Edelstein
  • Publication number: 20150200227
    Abstract: Some demonstrative embodiments include devices and/or methods of gettering on silicon on insulator (SOI) substrate. For example, a complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) may include a plurality of pixels arranged on a wafer, a pixel of the pixels including: a silicon active area; at least one non-silicided leakage-sensitive component formed on the active area, the leakage-sensitive component is sensitive to metal contaminants; a non-leakage-sensitive area formed on the active area, the non-leakage-sensitive area surrounding the leakage-sensitive component; and at least one silicided gettering region formed on the non-leakage-sensitive area to trap the metal contaminants.
    Type: Application
    Filed: January 16, 2014
    Publication date: July 16, 2015
    Inventors: Dmitry Veinger, Assaf Lahav, Omer Katz, Ruthie Shima-Edelstein