Patents by Inventor Dmytro Lysenko

Dmytro Lysenko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Integrated environment for execution monitoring and profiling of applications running on multi-processor system-on-chip
    Patent number: 8869163
    Abstract: There is provided a system and method for providing an integrated environment for execution monitoring and profiling of applications running on multi-processor system-on-chips. There is provided a method comprising obtaining task execution data of an application, the task execution data including a plurality of task executions assigned to a plurality of hardware resources, showing a scheduler view of the plurality of task executions on a display, receiving a modification request for a selected task execution from the plurality of task executions, reassigning the plurality of task executions to the plurality of hardware resources based on implementing the modification request, and updating the scheduler view on the display. As a result, the high level results of specific low level optimizations may be tested and retried to discover which optimization routes provide the greatest benefits.
    Type: Grant
    Filed: July 19, 2011
    Date of Patent: October 21, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Abdulnour Toukmaji, Dmytro Lysenko, Sumesh Subramanian
  • Integrated Environment for Execution Monitoring and Profiling of Applications Running on Multi-Processor System-on-Chip
    Publication number: 20120185864
    Abstract: There is provided a system and method for providing an integrated environment for execution monitoring and profiling of applications running on multi-processor system-on-chips. There is provided a method comprising obtaining task execution data of an application, the task execution data including a plurality of task executions assigned to a plurality of hardware resources, showing a scheduler view of the plurality of task executions on a display, receiving a modification request for a selected task execution from the plurality of task executions, reassigning the plurality of task executions to the plurality of hardware resources based on implementing the modification request, and updating the scheduler view on the display. As a result, the high level results of specific low level optimizations may be tested and retried to discover which optimization routes provide the greatest benefits.
    Type: Application
    Filed: July 19, 2011
    Publication date: July 19, 2012
    Applicant: MINDSPEED TECHNOLOGIES, INC.
    Inventors: Abdulnour Toukmaji, Dmytro Lysenko, Sumesh Subramanian