Abstract: An electronic device including a memory device with improved reliability is provided. The semiconductor device comprises a data pin configured to transmit a data signal, a command/address pin configured to transmit a command and an address, a command/address receiver connected to the command/address pin, and a computing unit connected to the command/address receiver, wherein the command/address receiver receives a first command and a first address from the outside through the command/address pin and generates a first instruction on the basis of the first command and the first address, and the computing unit receives the first instruction and performs computation based on the first instruction.

Abstract: A thin film deposition method may include preparing a substrate structure having an opening region formed in a vertical direction and a plurality of holes formed in a horizontal direction in each of two side portions exposed by the opening region, and adsorbing an inhibitor to surfaces of the substrate structure so that an adsorption density of the inhibitor outside of the plurality of holes is higher than an adsorption density inside of the plurality of holes by adsorbing the inhibitor in a deposition environment in which a gas diffusivity is larger in the vertical direction than in the horizontal direction. A deposition process of a material film on the inside and outside of the plurality of holes is then performed, wherein a deposition rate of the material film may vary according to the adsorption density of the inhibitor.

Abstract: A thin film deposition method and a method of fabricating an electronic device using the same are disclosed. The thin film deposition method may include preparing a substrate structure having a pattern portion including a hole, adsorbing a reaction inhibitor to inside and outside of the hole in the substrate structure, wherein an adsorption density of the reaction inhibitor may be lower in the inside than the outside, and depositing a metal layer on the inside and outside the hole by an atomic layer deposition (ALD) process, wherein a deposition rate of the depositing may vary depending on regions by the reaction inhibitor, and wherein the reaction inhibitor may include a metal atom and a ligand for reaction inhibition bonded to the metal atom, and the metal atom may remain on the substrate structure in the depositing the metal layer.

Abstract: Disclosed is a method of removing a photoresist pattern, which includes radiating light onto a substrate having a photoresist pattern formed thereon and implanted with a predetermined dopant so that the temperature of the substrate is increased to be equal to or higher than a temperature able to remove the photoresist pattern, and by which the photoresist pattern formed on the substrate can be almost completely removed using a simple process for radiating light onto the substrate so that the temperature of the substrate is increased to be equal to or higher than a temperature able to the photoresist pattern.

Abstract: Disclosed is a method of removing a photoresist pattern, which includes radiating light onto a substrate having a photoresist pattern formed thereon and implanted with a predetermined dopant so that the temperature of the substrate is increased to be equal to or higher than a temperature able to remove the photoresist pattern, and by which the photoresist pattern formed on the substrate can be almost completely removed using a simple process for radiating light onto the substrate so that the temperature of the substrate is increased to be equal to or higher than a temperature able to the photoresist pattern.

Abstract: A method of forming an integrated circuit device includes the steps of forming a conductive pattern on an integrated circuit device, and forming an insulating layer on the conductive pattern and on the integrated circuit substrate. An upper surface portion of the insulating layer opposite the substrate is removed, and a photoresist layer is formed on the insulating layer after the step of removing the upper surface portion. The photoresist layer is patterned, and exposed portions of the insulating layer are etched using the patterned photoresist layer as an etching mask thereby forming contact holes through the insulating layer.