Abstract: An X-ray imaging apparatus includes an imaging device configured to capture a camera image of a target; a controller configured to stitch a plurality of X-ray images of respective divided regions of the target to generate one X-ray image of the target; and a display configured to display a settings window that provides a GUI for receiving a setting of an X-ray irradiation condition for the respective divided regions, and display the camera image in which positions of the respective divided regions are displayed.

Abstract: An electronic device may include a storage device including a memory device configured to store data which includes map data including a plurality of map segments and a memory controller configured to be in communication with the memory device; and a host device configured to be in communication with the storage device and structured to include a host memory and configured to transmit, to the storage device, a request for one or more of the plurality of map segments from the storage device, wherein the memory controller of the storage device is configured to provide the one or more map segments to the host memory in the host device in response to the request from the host device, and wherein the host device is configured to transmit, to the storage device, a command requesting access to the memory device based on the one or more map segments.

Abstract: Provided is a method performed in a terminal for processing an interest message. The method includes receiving a message from a message server after a login event for a user of the terminal occurs, wherein the login event is related to a message service provided by the message server; storing, in response to determining that the received message corresponds to an interest message of the user, the received message in a local storage of the terminal; receiving a search request for the interest message of the user; and searching and providing the interest message of the user through the local storage of the terminal in response to the search request.

Abstract: The present disclosure relates to a positive active material for a lithium rechargeable battery, a manufacturing method thereof, and a lithium rechargeable battery including the positive active material, and it provides a positive active material which is a lithium composite metal oxide including nickel, cobalt, and manganese, and either has orientation in a direction of with respect to an ND axis that is equal to or greater than 29% or has orientation in a direction of [120]+[210] with respect to an RD axis that is equal to or greater than 82% in the case of an EBSD analysis with a misorientation angle (?g) that is equal to or less than 30 degrees.

Abstract: The present technology relates to an electronic device. According to the present technology, a memory controller may Include a write controller and a map manager. The write controller may search, in response to a write request for a second logical address received from a host during a first write operation for a first logical address, for a descriptor corresponding to the first write operation, determine whether the first logical address and the second logical address overlap, and set a map update flag corresponding to the first write operation based on a result of the determination. The map manager may update mapping information on the first logical address based on the map update flag.

Abstract: A memory system according to the present technology may include a plurality of memory devices including a plurality of blocks configured of memory cells and a memory controller configured to control the plurality of memory devices corresponding to a plurality of zones by configuring the plurality of zones with the plurality of blocks included in each of the plurality of memory devices, wherein the memory controller is further configured to: receive a write request from a host, determine a target zone indicated by the write request among the plurality of zones, and determine a logical address of the target zone on which a write operation is to be started based on a write pointer and an offset corresponding to the target zone.

Abstract: A memory system according to the present technology may include a plurality of memory devices including a plurality of blocks configured of memory cells and a memory controller configured to control the plurality of memory devices corresponding to a plurality of zones by configuring the plurality of zones with the plurality of blocks included in each of the plurality of memory devices, wherein the memory controller is further configured to: receive a write request from a host, determine a target zone indicated by the write request among the plurality of zones, and determine a logical address of the target zone on which a write operation is to be started based on a write pointer and an offset corresponding to the target zone.

Abstract: A memory system may include a memory device including at least one sequential area in which a data corresponding to consecutive logical addresses of the at least one sequential area is stored, a sequential buffer configured to temporarily store the data to be stored in the at least one sequential area, a meta buffer configured to store a meta data including a write pointer information indicating a logical address in which data is to be stored from among logical addresses corresponding to the at least one sequential area, and an area state information indicating whether the sequential buffer is allocated to the at least one sequential area, and a memory controller configured to perform a write operation of storing the data in the at least one sequential area in response to a first command received from the host using the meta data.

Abstract: A memory system includes a nonvolatile memory set including a nonvolatile memory; and a memory controller configured to control the nonvolatile memory set. The memory controller may write data to a memory block in a target memory block pool in the nonvolatile memory set during a target time period existing between a time at which an operation mode for the nonvolatile memory set is changed from a second operation mode to a first operation mode and a time at which a command including information indicating that a host expects a requested operation to be performed in the first operation mode is received from the host, prevent execution of a background operation for the nonvolatile memory set, when the operation mode is the first operation mode, and control a background operation for the nonvolatile memory set to be executable, when the operation mode is the second operation mode.

Abstract: A memory system may transfer a reference write size for a memory device to a host, and, when receiving, from the host, a write request for first data having a size corresponding to a multiple of the reference write size, may directly write the first data to the memory device without caching the first data in a write cache.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method of operating the same, and more particularly, to a memory system, a memory controller, and a method of operating the same, which calculate a read-attribute value, a write-attribute value, and a time-attribute value for a nonvolatile memory set and determine an operation mode of the nonvolatile memory set on the basis of at least one of the read-attribute value, the write-attribute value, and the time-attribute value, thereby enabling a host to predict whether or not a memory controller executes a background operation.

Abstract: A memory system includes: a plurality of memory devices; a plurality of cores suitable for controlling the plurality of memory devices, respectively; and a controller including: a host interface layer for providing any one of the cores with a request of a host based on mapping between logical addresses and the cores, a remap manager for changing the mapping between the logical addresses and the cores in response to a trigger, a data swapper for swapping data between the plurality of memory devices based on the changed mapping, and a state manager for determining a state of the memory system depending on whether the data swapper is swapping the data or has completed swapping the data, and providing the remap manager with the trigger based on the state of the memory system and a difference in a degree of wear between the plurality of memory devices.

Abstract: A memory system may include a memory device including at least one sequential area in which a data corresponding to consecutive logical addresses of the at least one sequential area is stored, a sequential buffer configured to temporarily store the data to be stored in the at least one sequential area, a meta buffer configured to store a meta data including a write pointer information indicating a logical address in which data is to be stored from among logical addresses corresponding to the at least one sequential area, and an area state information indicating whether the sequential buffer is allocated to the at least one sequential area, and a memory controller configured to perform a write operation of storing the data in the at least one sequential area in response to a first command received from the host using the meta data.

Abstract: A memory system according to the present technology may include a plurality of memory devices including a plurality of memory devices including a plurality of blocks configured of memory cells and a memory controller configured to control the plurality of memory devices corresponding to a plurality of zones by configuring the plurality of zones with the plurality of blocks included in each of the plurality of memory devices, wherein the memory controller is further configured to: receive a write request from a host, determine a target zone indicated by the write request among the plurality of zones, and determine a logical address of the target zone on which a write operation is to be started based on a write pointer and an offset corresponding to the target zone.

Abstract: A memory system may transfer a reference write size for a memory device to a host, and, when receiving, from the host, a write request for first data having a size corresponding to a multiple of the reference write size, may directly write the first data to the memory device without caching the first data in a write cache.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method of operating the same, and more particularly, to a memory system, a memory controller, and a method of operating the same, which calculate a read-attribute value, a write-attribute value, and a time-attribute value for a nonvolatile memory set and determine an operation mode of the nonvolatile memory set on the basis of at least one of the read-attribute value, the write-attribute value, and the time-attribute value, thereby enabling a host to predict whether or not a memory controller executes a background operation.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method of operating the same, and more particularly, to a memory system, a memory controller, and a method of operating the same, which calculate a read-attribute value, a write-attribute value, and a time-attribute value for a nonvolatile memory set and determine an operation mode of the nonvolatile memory set on the basis of at least one of the read-attribute value, the write-attribute value, and the time-attribute value, thereby enabling a host to predict whether or not a memory controller executes a background operation.

Abstract: A memory system includes: a plurality of memory devices; a plurality of cores suitable for controlling the plurality of memory devices, respectively; and a controller including: a host interface layer for providing any one of the cores with a request of a host based on mapping between logical addresses and the cores, a remap manager for changing the mapping between the logical addresses and the cores in response to a trigger, a data swapper for swapping data between the plurality of memory devices based on the changed mapping, and a state manager for determining a state of the memory system depending on whether the data swapper is swapping the data or has completed swapping the data, and providing the remap manager with the trigger based on the state of the memory system and a difference in a degree of wear between the plurality of memory devices.

Abstract: Embodiments of the present disclosure relate to a memory system, a memory controller, and a method of operating the same, and more particularly, to a memory system, a memory controller, and a method of operating the same, which calculate a read-attribute value, a write-attribute value, and a time-attribute value for a nonvolatile memory set and determine an operation mode of the nonvolatile memory set on the basis of at least one of the read-attribute value, the write-attribute value, and the time-attribute value, thereby enabling a host to predict whether or not a memory controller executes a background operation.

Abstract: A memory system includes a nonvolatile memory set including a nonvolatile memory; and a memory controller configured to control the nonvolatile memory set. The memory controller may write data to a memory block in a target memory block pool in the nonvolatile memory set during a target time period existing between a time at which an operation mode for the nonvolatile memory set is changed from a second operation mode to a first operation mode and a time at which a command including information indicating that a host expects a requested operation to be performed in the first operation mode is received from the host, prevent execution of a background operation for the nonvolatile memory set, when the operation mode is the first operation mode, and control a background operation for the nonvolatile memory set to be executable, when the operation mode is the second operation mode.