Patents by Inventor Do-Jae Yoo

Do-Jae Yoo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10667419
    Abstract: There are provided an electronic component module in which an external terminal is disposed outwardly from a mold part by a plating process and a manufacturing method thereof. The electronic component module includes a substrate, at least one electronic component mounted on the substrate, a mold part sealing the electronic component, and at least one connection conductor having one end bonded to one surface of the substrate and formed in the mold part so as to penetrate through the mold part. The connection conductor is formed to have a form in which horizontal cross-sectional areas of the connection conductor are gradually reduced toward the substrate and includes at least one step.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: May 26, 2020
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Eun Jung Jo, Jae Hyun Lim
  • Patent number: 10356911
    Abstract: An electronic device module includes: a board including at least one mounting electrode and at least one external connection electrode and having a protective insulation layer which is provided on an outer surface thereof; at least one electronic device mounted on the mounting electrodes; a molded part sealing the electronic device; and at least one connective conductor of which one end is bonded to the external connection electrode of the board and which penetrates through the molded part to be disposed in the molded part, wherein the protective insulation layer is disposed to be spaced apart from the connective conductor.
    Type: Grant
    Filed: June 5, 2015
    Date of Patent: July 16, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Jae Hyun Lim, Jong In Ryu, Kyu Hwan Oh, Ki Ju Lee
  • Patent number: 10219380
    Abstract: An electronic device module includes a board including external connecting electrodes and mounting electrodes; an electronic device mounted on the mounting electrodes; a molded portion sealing the electronic device; connection conductors having an end bonded to the external connecting electrodes and penetrating through the molded portion; and external terminals bonded to another end of the connection conductors.
    Type: Grant
    Filed: April 1, 2015
    Date of Patent: February 26, 2019
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Jae Hyun Lim, Kyu Hwan Oh, Jong In Ryu
  • Patent number: 10163746
    Abstract: A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The semiconductor package and manufacturing method thereof also include a mold part stacked embedding the chip member, a connection member disposed at a center portion of the mold part, and a solder part formed on a portion of the connection member.
    Type: Grant
    Filed: January 21, 2016
    Date of Patent: December 25, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong In Ryu, Ki Joo Sim, Do Jae Yoo, Ki Ju Lee, Jin Su Kim
  • Patent number: 10109595
    Abstract: A double-sided package module includes a substrate, a first sealing member, a second sealing member, and an extension portion. The substrate includes electronic components positioned on a first surface and a second surface of the substrate. The first sealing member and the second sealing member are positioned on the first surface and the second surface, respectively. The extension portion protrudes from a lateral surface of the substrate into a space between the first sealing member and the second sealing member.
    Type: Grant
    Filed: September 16, 2016
    Date of Patent: October 23, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Hee Jung Jung, Jong In Ryu, Ki Joo Sim
  • Publication number: 20180110147
    Abstract: There are provided an electronic component module in which an external terminal is disposed outwardly from a mold part by a plating process and a manufacturing method thereof. The electronic component module includes a substrate, at least one electronic component mounted on the substrate, a mold part sealing the electronic component, and at least one connection conductor having one end bonded to one surface of the substrate and formed in the mold part so as to penetrate through the mold part. The connection conductor is formed to have a form in which horizontal cross-sectional areas of the connection conductor are gradually reduced toward the substrate and includes at least one step.
    Type: Application
    Filed: November 29, 2017
    Publication date: April 19, 2018
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae YOO, Eun Jung JO, Jae Hyun LIM
  • Patent number: 9894790
    Abstract: There are provided an electronic component module in which an external terminal is disposed outwardly from a mold part by a plating process and a manufacturing method thereof. The electronic component module includes a substrate, at least one electronic component mounted on the substrate, a mold part sealing the electronic component, and at least one connection conductor having one end bonded to one surface of the substrate and formed in the mold part so as to penetrate through the mold part. The connection conductor is formed to have a form in which horizontal cross-sectional areas of the connection conductor are gradually reduced toward the substrate and includes at least one step.
    Type: Grant
    Filed: April 24, 2014
    Date of Patent: February 13, 2018
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Eun Jung Jo, Jae Hyun Lim
  • Publication number: 20170301632
    Abstract: The method of manufacturing a package comprising: preparing a strip substrate having a plurality of separate package regions which are partitioned by a dicing region and via pads which are connected to one ends of plated tails which are divided to be disconnected in the dicing region; mounting at least one electronic component on at least one surface of each package region of the substrate; forming a connection pattern having conductivity in disconnected portions of the plated tails to form electrical connections therebetween; forming a molded part on the surface of the substrate to enclose the electronic component; forming at least one via penetrating through the molded part by applying current through the plated tails; and dicing the substrate in the dicing region to divide the substrate into separate packages, each having the connection pattern exposed to the exterior of the substrate.
    Type: Application
    Filed: June 29, 2017
    Publication date: October 19, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Do Jae YOO, Kyu Hwan OH, Jong In RYU, Jae Hyun LIM
  • Patent number: 9748179
    Abstract: The package includes: a substrate having at least one circuit layer; at least one electronic component mounted on at least one surface of the substrate; a molded part formed on the surface of the substrate to enclose the electronic component; at least one via formed in the molded part to be electrically connected to the circuit layer of the substrate; and a pattern connected to one end of a plated tail connected to the circuit layer connected to the via and exposed to the exterior of the substrate.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: August 29, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Kyu Hwan Oh, Jong In Ryu, Jae Hyun Lim
  • Publication number: 20170221835
    Abstract: A double-sided package module includes a substrate, a first sealing member, a second sealing member, and an extension portion. The substrate includes electronic components positioned on a first surface and a second surface of the substrate. The first sealing member and the second sealing member are positioned on the first surface and the second surface, respectively. The extension portion protrudes from a lateral surface of the substrate into a space between the first sealing member and the second sealing member.
    Type: Application
    Filed: September 16, 2016
    Publication date: August 3, 2017
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae YOO, Hee Jung JUNG, Jong In RYU, Ki Joo SIM
  • Patent number: 9633923
    Abstract: There are provided an electronic device module capable of increasing a degree of integration by mounting electronic components on both surfaces of a board, and a manufacturing method thereof. The electronic device module includes a board having mounting electrodes formed on both surfaces thereof, a plurality of electronic devices mounted on the mounting electrodes, a molded portion sealing the electronic devices, at least one connection wire having one end bonded to one surface of the board and the other end exposed to the outside of the molded portion, and an external connection terminal coupled to the other end of the connection wire.
    Type: Grant
    Filed: July 23, 2014
    Date of Patent: April 25, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Jae Hyun Lim, Sun Ho Kim
  • Patent number: 9585260
    Abstract: There are provided an electronic component module capable of increasing a degree of integration by mounting electronic components on both surfaces of a substrate, and a manufacturing method thereof. The electronic component module according to an exemplary embodiment of the present disclosure includes: a substrate; a plurality of electronic components mounted on both surfaces of the substrate; connection conductors each having one end bonded to one surface of the substrate using an conductive adhesive; and a molded portion having the connection conductor embedded therein and formed on one surface of the substrate, wherein the connection conductor may have at least one blocking member preventing a spread of the conductive adhesive.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: February 28, 2017
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hyun Lim, Jong In Ryu, Sun Ho Kim, Eun Jung Jo, Kyu Hwan Oh, Do Jae Yoo
  • Publication number: 20170018513
    Abstract: There are provided a semiconductor package including an antenna formed integrally therewith, and a method of manufacturing the same. The semiconductor package includes: a semiconductor chip; a sealing part sealing the semiconductor chip; a substrate part formed on at least one surface of the sealing part; and an antenna part formed on the sealing part or the substrate part and electrically connected to the semiconductor chip.
    Type: Application
    Filed: September 27, 2016
    Publication date: January 19, 2017
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Do Jae YOO, Jung Ho YOON, Chul Gyun PARK, Myeong Woo HAN, Jung Aun LEE
  • Patent number: 9508565
    Abstract: The semiconductor package according to an exemplary embodiment includes: a substrate having a plurality of circuit layers and connection pads which are provided between a plurality of insulating layers; a plated tail part of which one end is electrically connected to the connection pad; a dicing part provided in contact with the other end of the plated tail part; a molded part provided on the substrate; and molded part vias provided on the connection pads and penetrating through the molded part.
    Type: Grant
    Filed: July 14, 2015
    Date of Patent: November 29, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae Hyun Lim, Do Jae Yoo, Eun Jung Jo
  • Patent number: 9496219
    Abstract: A semiconductor package including an antenna formed integrally therewith. The semiconductor package includes: a semiconductor chip; a sealing part sealing the semiconductor chip; a substrate part formed on at least one surface of the sealing part; and an antenna part formed on the sealing part and electrically connected to the semiconductor chip.
    Type: Grant
    Filed: July 3, 2013
    Date of Patent: November 15, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Do Jae Yoo, Jung Ho Yoon, Chul Gyun Park, Myeong Woo Han, Jung Aun Lee
  • Publication number: 20160315027
    Abstract: A semiconductor package and manufacturing method thereof includes a chip member installed on an upper surface, a lower surface, or both of a substrate. The semiconductor package and manufacturing method thereof also include a mold part stacked embedding the chip member, a connection member disposed at a center portion of the mold part, and a solder part formed on a portion of the connection member.
    Type: Application
    Filed: January 21, 2016
    Publication date: October 27, 2016
    Applicant: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong In RYU, Ki Joo SIM, Do Jae YOO, Ki Ju LEE, Jin Su KIM
  • Patent number: 9343391
    Abstract: Disclosed herein are a semiconductor package and a method of manufacturing the same. The semiconductor package includes: a substrate including a mounting electrode formed on both sides and a wiring; a plurality of first electronic devices mounted on the substrate; a second electronic devices mounted on the substrate; and a via through which the wiring of the substrate and the second electronic devices are connected.
    Type: Grant
    Filed: June 4, 2014
    Date of Patent: May 17, 2016
    Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Kyu Hwan Oh, Do Jae Yoo
  • Publication number: 20160126200
    Abstract: A semiconductor device package is provided with integrated antenna for wireless applications. The semiconductor device package comprises a substrate including a semiconductor chip mounted thereon: a protective layer covering the semiconductor chip; a metal pattern mounted on the protective layer; and a first connective member connecting the semiconductor chip and the metal pattern. According to this configuration, the semiconductor device package is capable of being easily manufactured while minimizing the electrical distance between the metal pattern for use as an antenna and the semiconductor chip.
    Type: Application
    Filed: December 9, 2015
    Publication date: May 5, 2016
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Myeong Woo HAN, Do Jae YOO, Jung Aun LEE, Jung Ho YOON, Chul Gyun PARK
  • Publication number: 20160035678
    Abstract: The semiconductor package includes: a substrate having at least one circuit layer; at least one electronic component mounted on at least one surface of the substrate; a molded part formed on the surface of the substrate to enclose the electronic component; at least one via formed in the molded part to be electrically connected to the circuit layer of the substrate; and a semiconductive pattern connected to one end of a plated tail connected to the circuit layer connected to the via and exposed to the exterior of the substrate.
    Type: Application
    Filed: July 28, 2015
    Publication date: February 4, 2016
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Do Jae YOO, Kyu Hwan OH, Jong In RYU, Jae Hyun LIM
  • Patent number: 9245858
    Abstract: A semiconductor device package is provided with integrated antenna for wireless applications. The semiconductor device package comprises a substrate including a semiconductor chip mounted thereon; a protective layer covering the semiconductor chip; a metal pattern mounted on the protective layer; and a first connective member connecting the semiconductor chip and the metal pattern. According to this configuration, the semiconductor device package is capable of being easily manufactured while minimizing the electrical distance between the metal pattern for use as an antenna and the semiconductor chip.
    Type: Grant
    Filed: September 21, 2011
    Date of Patent: January 26, 2016
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Myeong Woo Han, Do Jae Yoo, Jung Aun Lee, Jung Ho Yoon, Chul Gyun Park