Abstract: A multilayer ceramic electronic component includes: a ceramic body having a dielectric layer, and a plurality of first and second internal electrodes facing each other with the dielectric layer interposed therebetween; and first and second external electrodes disposed on an outer surface of the ceramic body, respectively. The ceramic body includes an active portion including a plurality of internal electrodes facing each other with the dielectric layer interposed therebetween to form capacitance, and cover portions formed on upper and lower portions of the active portion. A buffer region is disposed between at least one pair of first and second internal electrodes among the plurality of first and second internal electrodes disposed inside the active portion, and satisfies the relation 0<tb<150 ?m+td, where td is a thickness of the dielectric layer, and tb is a thickness of the buffer region.

Abstract: A multilayer ceramic electronic component includes: a ceramic body having a dielectric layer, and a plurality of first and second internal electrodes facing each other with the dielectric layer interposed therebetween; and first and second external electrodes disposed on an outer surface of the ceramic body, respectively. The ceramic body includes an active portion including a plurality of internal electrodes facing each other with the dielectric layer interposed therebetween to form capacitance, and cover portions formed on upper and lower portions of the active portion. A buffer region is disposed between at least one pair of first and second internal electrodes among the plurality of first and second internal electrodes disposed inside the active portion, and satisfies the relation 0<tb<150 ?m+td, where td is a thickness of the dielectric layer, and tb is a thickness of the buffer region.

Abstract: A multilayer ceramic electronic component includes: a ceramic body having a dielectric layer, and a plurality of first and second internal electrodes facing each other with the dielectric layer interposed therebetween; and first and second external electrodes disposed on an outer surface of the ceramic body, respectively. The ceramic body includes an active portion including a plurality of internal electrodes facing each other with the dielectric layer interposed therebetween to form capacitance, and cover portions formed on upper and lower portions of the active portion. A buffer region is disposed between at least one pair of first and second internal electrodes among the plurality of first and second internal electrodes disposed inside the active portion, and satisfies the relation 0<tb<150 ?m+td, where td is a thickness of the dielectric layer, and tb is a thickness of the buffer region.

Abstract: A multilayer ceramic electronic component includes: a ceramic body having a dielectric layer, and a plurality of first and second internal electrodes facing each other with the dielectric layer interposed therebetween; and first and second external electrodes disposed on an outer surface of the ceramic body, respectively. The ceramic body includes an active portion including a plurality of internal electrodes facing each other with the dielectric layer interposed therebetween to form capacitance, and cover portions formed on upper and lower portions of the active portion. A buffer region is disposed between at least one pair of first and second internal electrodes among the plurality of first and second internal electrodes disposed inside the active portion, and satisfies the relation 0<tb<150 ?m+td, where td is a thickness of the dielectric layer, and tb is a thickness of the buffer region.

Abstract: A liquid crystal display device includes gate and data lines on a first substrate, wherein the gate lines cross the data lines to define sub-pixels, thin film transistors adjacent to where the gate lines cross the data lines, pixel electrodes connected to the thin film transistors, common electrodes at left and right sides of the sub-pixels, wherein a first parasitic capacitance between a first data line arranged at the left side of a first sub-pixel and an adjacent first common electrode is smaller than a second parasitic capacitance between a second data line arranged at the right side of the first sub-pixel and an adjacent second common electrode, and a second substrate bonded to the first substrate with a layer of liquid crystal molecules therebetween.

Abstract: Provided is an optical image receiving device having a high and rapid sensitivity and a wide dynamic range manufacture in a CMOS process. The image receiving device includes a capacitor transistor for a special purpose in addition to a general structure of three transistors and a light receiving portion. The capacitor transistor has first and second source/drain ports connected to the capacitance node and the floating diffusion node, respectively, and is gated in response to activation of a predetermined capacitor control signal. In the CMOS optical image receiving device, the floating diffusion node is pumped over an external power voltage. Thus, the electronic potential of the floating diffusion node in the initialization state is much higher than the maximum voltage of the light receiving portion. Thus, the CMOS active pixel has a very high sensitivity in a region where the intensity of light is weak.

Abstract: An LCD device includes a data line, a dummy layer, and source and drain electrodes formed on a substrate; an ohmic contact layer formed on the data line, the dummy layer, and the source and drain electrodes; a semiconductor and a gate insulating layers formed on the substrate; a plurality of contact holes formed through the ohmic contact layer, the semiconductor layer, and the gate insulating layer, wherein at least one contact hole exposes the drain electrode; a gate line formed on the gate insulating layer perpendicular to the data line; a gate electrode formed extending from the gate line, the gate electrode positioned between the source and drain electrodes; pixel regions defined by intersections of the gate and data lines; and a pixel electrode connected with the drain electrode through another contact hole, wherein the pixel electrode is formed of a same material as the gate line.

Abstract: An in-plane switching mode liquid crystal display device includes first and second substrates, a gate line on the first substrate, a data line crossing the gate line defining a unit pixel region, a thin film transistor at the crossing of the gate line and the data line, a pixel electrode line in parallel with the data line, a plurality of pixel electrodes formed to be protruded in an extended direction of the gate line from the pixel electrode line, a common electrode line adjacent to a data line of a neighboring pixel in the extended direction of the gate line and in parallel therewith, a plurality of common electrodes protruded from the common electrode line and alternately arranged in parallel with the plurality of pixel electrodes to generate an in-plane electric field, and a liquid crystal layer between the first and second substrates.

Abstract: Provided is a CMOS active pixel and a driving method thereof. The timing of the transmission control signal and the reset control signal generated in the read-out section is performed in advance in the reset section. Thus, the potential wall between the photodiode area and the transmission transistor having a size corresponding to one generated in the read-to section is generated in the reset section in advance and the photodiode area is filled with charges. Thus, a dead region is reduced in the read-out section. Thus, a minimum light amount characteristic of an image sensor is improved. Also, in the reset section, the transmission transistor connecting the collection node to accumulate the signal charges generated from the photodiode and the floating diffusive node is turned on once or two time or more. Thus, a difference between the initial voltage of the collection node and the voltage of the reset level of the floating diffusive node is much reduced.

Abstract: A liquid crystal display device includes a gate line formed on a substrate; first and second data lines crossing the gate line to form adjacent pixel regions in a direction of the gate line; pixel electrodes and common electrodes substantially parallel to each other and generating an in-plane electric field; a first pixel electrode line parallel to the first data line and spaced apart from the first data line by a first isolation distance; a second pixel electrode line spaced apart from the second data line by a second isolation distance; and a first common line parallel to the first data line and spaced apart from the first data line by a third isolation distance; a second common line spaced from the second data line by a fourth isolation distance, wherein the first isolation distance is shorter than the third isolation distance, and a parasitic capacitance between the first pixel electrode line and the first data line is greater than a parasitic capacitance between the second pixel electrode line and the se

Abstract: The polymers of ethylenically unsaturated monomers exhibit a greater degree of clarity and a greater degree of heat stability than do vinylidene chloride copolymers but do not have the barrier properties of vinylidene chloride copolymers. The present invention is an emulsion polymerized interpolymer, which provides both clarity and low oxygen permeability to applications where such properties are required of a polymer, having two miscible phases, which comprises (a) a first phase of an effective amount of at least one ethylenically unsaturated monomer and (b) a second phase of an effective amount of vinylidene chloride monomer and at least one ethylenically unsaturated comonomer wherein the first phase and the second phase are miscible.