Patents by Inventor Dock-Heung Kim

Dock-Heung Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Multi-layer printed circuit board and a BGA semiconductor package using the multi-layer printed circuit board
    Patent number: 6884945
    Abstract: A multi-layer printed circuit board on which insulation resin layers and circuit pattern layers are alternatively stacked to form multiple layers, including: an insulation resin layer; a circuit pattern formed at the upper surface of the insulation resin layer; a blind via hole formed penetrating the insulation resin layer and the circuit pattern; a plated layer formed at the upper surface of the circuit pattern, at the inner wall face and the bottom of the blind via hole; an inner lead bump pad formed at the surface of the plated layer which is exposed to the lower surface of the insulation resin layer; and an outer lead bump pad formed on the circuit pattern which is formed at the upper surface of the insulation resin layer, whereby the problem of defective attachment of a bump due to a void present in a blind via hole is eliminated.
    Type: Grant
    Filed: March 11, 2003
    Date of Patent: April 26, 2005
    Assignee: LG Electronics Inc.
    Inventors: Dock-Heung Kim, Yong-Il Kim
  • Multi-layer printed circuit board and a BGA semiconductor package using the multi-layer printed circuit board
    Publication number: 20030168255
    Abstract: A multi-layer printed circuit board on which insulation resin layers and circuit pattern layers are alternatively stacked to form multiple layers, including: an insulation resin layer; a circuit pattern formed at the upper surface of the insulation resin layer; a blind via hole formed penetrating the insulation resin layer and the circuit pattern; a plated layer formed at the upper surface of the circuit pattern, at the inner wall face and the bottom of the blind via hole; an inner lead bump pad formed at the surface of the plated layer which is exposed to the lower surface of the insulation resin layer; and an outer lead bump pad formed on the circuit pattern which is formed at the upper surface of the insulation resin layer, whereby the problem of defective attachment of a bump due to a void present in a blind via hole is eliminated.
    Type: Application
    Filed: March 11, 2003
    Publication date: September 11, 2003
    Applicant: LG ELECTRONICS INC.
    Inventors: Dock-Heung Kim, Yong-Il Kim
  • Multi-layer printed circuit board and a BGA semiconductor package using the multi-layer printed circuit board
    Patent number: 6580036
    Abstract: A multi-layer printed circuit board on which insulation resin layers and circuit pattern layers are alternatively stacked to form multiple layers, including: an insulation resin layer; a circuit pattern formed at the upper surface of the insulation resin layer; a blind via hole formed penetrating the insulation resin layer and the circuit pattern; a plated layer formed at the upper surface of the circuit pattern, at the inner wall face and the bottom of the blind via hole; an inner lead bump pad formed at the surface of the plated layer which is exposed to the lower surface of the insulation resin layer; and an outer lead bump pad formed on the circuit pattern which is formed at the upper surface of the insulation resin layer, whereby the problem of defective attachment of a bump due to a void present in a blind via hole is eliminated.
    Type: Grant
    Filed: April 11, 2001
    Date of Patent: June 17, 2003
    Assignee: LG Electronics Inc.
    Inventors: Dock-Heung Kim, Yong-Il Kim
  • Multi-layer printed circuit board and fabrication method thereof and a BGA semiconductor package using the multi-layer printed circuit board
    Publication number: 20010027875
    Abstract: A multi-layer printed circuit board on which insulation resin layers and circuit pattern layers are alternatively stacked to form multiple layers, including: an insulation resin layer; a circuit pattern formed at the upper surface of the insulation resin layer; a blind via hole formed penetrating the insulation resin layer and the circuit pattern; a plated layer formed at the upper surface of the circuit pattern, at the inner wall face and the bottom of the blind via hole; an inner lead bump pad formed at the surface of the plated layer which is exposed to the lower surface of the insulation resin layer; and an outer lead bump pad formed on the circuit pattern which is formed at the upper surface of the insulation resin layer, whereby the problem of defective attachment of a bump due to a void present in a blind via hole is eliminated.
    Type: Application
    Filed: April 11, 2001
    Publication date: October 11, 2001
    Inventors: Dock-Heung Kim, Yong-Il Kim