Patents by Inventor Domenico Pappalardo
Domenico Pappalardo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 7256640Abstract: Protecting the devices of a charge pump includes the connection of a high-voltage transistor between the output node of the charge pump and the load being supplied, and in controlling this transistor with a fraction of the output voltage of the charge pump. This control is accomplished by connecting the control node of the high-voltage transistor to a node of connection between two stages of the multi-stage charge pump onto which a fraction of the controlled output voltage of the multi-stage charge pump is produced. The high-voltage output transistor protects the low voltage devices of the multi-stage charge pump, by preventing the controlled output voltage from undergoing excessively abrupt variations, that could damage the transistors of the last stage of the charge pump.Type: GrantFiled: January 3, 2005Date of Patent: August 14, 2007Assignee: STMicroelectronics S.r.l.Inventors: Carmelo Ucciardello, Rosa Di Mauro, Domenico Pappalardo, Francesco Sorrentino, Giuseppe Maganuco, Gaetano Palumbo
-
Patent number: 7224206Abstract: A charge pump is proposed. The charge pump is integrated in a chip of semiconductor material and includes a plurality of capacitive elements each one connected to a corresponding circuit node of the charge pump, the circuit nodes being arranged in a sequence from an input node to an output node, a plurality of field effect transistors each one for selectively connecting a corresponding first circuit node with a second adjacent circuit node, each transistor being made in a corresponding insulated body region, and for each transistor first biasing means for equalizing the body region with the first circuit node when the transistor is closed, wherein for each transistor the charge pump further includes second biasing means for equalizing the body region with the second circuit node when the transistor is opened.Type: GrantFiled: February 24, 2005Date of Patent: May 29, 2007Assignee: STMicroelectronics S.r.l.Inventors: Domenico Pappalardo, Carmelo Ucciardello, Gaetano Palumbo
-
Patent number: 7095268Abstract: A single-stage clock booster produces a boosted clock voltage on an output node that is a multiple of a supply voltage. The single-stage clock booster includes a pump capacitor having a first terminal being driven by a first control phase signal. A first switch is controlled by the boosted clock voltage for connecting a second terminal of the pump capacitor to the supply voltage during a charge phase. A second switch connects the second terminal of the pump capacitor to the output node during a boosted clock voltage output phase. A switching circuit alternately connects a control node of the second switch to the supply voltage and to the first terminal of the pump capacitor. The switching circuit is driven by a second control phase signal. A third switch is controlled by a third control phase signal for connecting the output node to a reference voltage during the charge phase.Type: GrantFiled: January 11, 2005Date of Patent: August 22, 2006Assignee: STMicroelectronics S.r.l.Inventors: Domenico Pappalardo, Carmelo Ucciardello, Gaetano Palumbo, Paolo Scalisi
-
Publication number: 20060152273Abstract: A single-stage clock booster produces a boosted clock voltage on an output node that is a multiple of a supply voltage. The single-stage clock booster includes a pump capacitor having a first terminal being driven by a first control phase signal. A first switch is controlled by the boosted clock voltage for connecting a second terminal of the pump capacitor to the supply voltage during a charge phase. A second switch connects the second terminal of the pump capacitor to the output node during a boosted clock voltage output phase. A switching circuit alternately connects a control node of the second switch to the supply voltage and to the first terminal of the pump capacitor. The switching circuit is driven by a second control phase signal. A third switch is controlled by a third control phase signal for connecting the output node to a reference voltage during the charge phase.Type: ApplicationFiled: January 11, 2005Publication date: July 13, 2006Applicant: STMicroelectronics S.r.I.Inventors: Domenico Pappalardo, Carmelo Ucciardello, Gaetano Palumbo, Paolo Scalisi
-
Publication number: 20060145747Abstract: Protecting the devices of a charge pump includes the connection of a high-voltage transistor between the output node of the charge pump and the load being supplied, and in controlling this transistor with a fraction of the output voltage of the charge pump. This control is accomplished by connecting the control node of the high-voltage transistor to a node of connection between two stages of the multi-stage charge pump onto which a fraction of the controlled output voltage of the multi-stage charge pump is produced. The high-voltage output transistor protects the low voltage devices of the multi-stage charge pump, by preventing the controlled output voltage from undergoing excessively abrupt variations, that could damage the transistors of the last stage of the charge pump.Type: ApplicationFiled: January 3, 2005Publication date: July 6, 2006Applicant: STMicroelectronics S.r.l.Inventors: Carmelo Ucciardello, Rosa Di Mauro, Domenico Pappalardo, Francesco Sorrentino, Giuseppe Maganuco, Gaetano Palumbo
-
Publication number: 20050200399Abstract: A charge pump is proposed. The charge pump is integrated in a chip of semiconductor material and includes a plurality of capacitive elements each one connected to a corresponding circuit node of the charge pump, the circuit nodes being arranged in a sequence from an input node to an output node, a plurality of field effect transistors each one for selectively connecting a corresponding first circuit node with a second adjacent circuit node, each transistor being made in a corresponding insulated body region, and for each transistor first biasing means for equalizing the body region with the first circuit node when the transistor is closed, wherein for each transistor the charge pump further includes second biasing means for equalizing the body region with the second circuit node when the transistor is opened.Type: ApplicationFiled: February 24, 2005Publication date: September 15, 2005Applicant: STMicroelectronics S.r.l.Inventors: Domenico Pappalardo, Carmelo Ucciardello, Gaetano Palumbo
-
Patent number: 6943615Abstract: The charge pump uses PMOS transistors for implementing the first and the second charge transfer switches of the charge pump. Substantially, the closing and opening of the first switch through which the first capacitor is charged, of the second switch for transferring the electric charge from the first capacitor to the load capacitance connected to the output node of the circuit and of the third switch for discharging to ground the load capacitance, are driven by a logic NOR gate. A first input of the NOR gate is connected to a common control node of the PMOS transistor forming the second switch and of a NMOS transistor forming the third switch, a second inverting input is connected to the output node, and the output is connected to the first capacitor.Type: GrantFiled: February 21, 2003Date of Patent: September 13, 2005Assignee: STMicroelectronics S.r.l.Inventors: Domenico Pappalardo, Maurizio Gaibotti
-
Patent number: 6927441Abstract: A variable charge pump contains several individual simple charge pumps, each with a pumping capacitor and a switching mechanism. Additionally, a switching network is coupled to the individual charge pumps so that the different lines in the charge pump can be connected together in a serial mode or parallel mode (or mixed serial and parallel modes) to match the needs of the output load. The switching network is easily changed to provide the necessary driving capability as the needs of the output load changes.Type: GrantFiled: January 15, 2002Date of Patent: August 9, 2005Assignee: STMicroelectronics S.r.l.Inventors: Domenico Pappalardo, Maurizio Gaibotti, Gaetano Palumbo, Antonino Conte, Stefano Lo Giudice
-
Publication number: 20030174010Abstract: The charge pump uses PMOS transistors for implementing the first and the second charge transfer switches of the charge pump. Substantially, the closing and opening of the first switch through which the first capacitor is charged, of the second switch for transferring the electric charge from the first capacitor to the load capacitance connected to the output node of the circuit and of the third switch for discharging to ground the load capacitance, are driven by a logic NOR gate. A first input of the NOR gate is connected to a common control node of the PMOS transistor forming the second switch and of a NMOS transistor forming the third switch, a second inverting input is connected to the output node, and the output is connected to the first capacitor.Type: ApplicationFiled: February 21, 2003Publication date: September 18, 2003Applicant: STMicroelectronics S.r.I.Inventors: Domenico Pappalardo, Maurizio Gaibotti
-
Publication number: 20020163376Abstract: A variable charge pump contains several individual simple charge pumps, each with a pumping capacitor and a switching mechanism. Additionally, a switching network is coupled to the individual charge pumps so that the different lines in the charge pump can be connected together in a serial mode or parallel mode (or mixed serial and parallel modes) to match the needs of the output load. The switching network is easily changed to provide the necessary driving capability as the needs of the output load changes.Type: ApplicationFiled: January 15, 2002Publication date: November 7, 2002Applicant: STMicroelectronics S.r.I.Inventors: Domenico Pappalardo, Maurizio Gaibotti, Gaetano Palumbo, Antonino Conte, Stefano Lo Giudice