Patents by Inventor Domingo Figueredo
Domingo Figueredo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 6472954Abstract: In an array of acoustic resonators, the effective coupling coefficient of first and second filters are individually tailored in order to achieve desired frequency responses. In a duplexer embodiment, the effective coupling coefficient of a transmit band-pass filter is lower than the effective coupling coefficient of a receive band-pass filter of the same duplexer. In one embodiment, the tailoring of the coefficients is achieved by varying the ratio of the thickness of a piezoelectric layer to the total thickness of electrode layers. For example, the total thickness of the electrode layers of the transmit filter may be in the range of 1.2 to 2.8 times the total thickness of the electrode layers of the receive filter. In another embodiment, the coefficient tailoring is achieved by forming a capacitor in parallel with an acoustic resonator within the filter for which the effective coupling coefficient is to be degraded.Type: GrantFiled: April 23, 2001Date of Patent: October 29, 2002Assignee: Agilent Technologies, Inc.Inventors: Richard C. Ruby, Paul Bradley, Domingo Figueredo, John D. Larson, III, Yury Oshmyansky
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Publication number: 20020153965Abstract: In an array of acoustic resonators, the effective coupling coefficient of first and second filters are individually tailored in order to achieve desired frequency responses. In a duplexer embodiment, the effective coupling coefficient of a transmit band-pass filter is lower than the effective coupling coefficient of a receive band-pass filter of the same duplexer. In one embodiment, the tailoring of the coefficients is achieved by varying the ratio of the thickness of a piezoelectric layer to the total thickness of electrode layers. For example, the total thickness of the electrode layers of the transmit filter may be in the range of 1.2 to 2.8 times the total thickness of the electrode layers of the receive filter. In another embodiment, the coefficient tailoring is achieved by forming a capacitor in parallel with an acoustic resonator within the filter for which the effective coupling coefficient is to be degraded.Type: ApplicationFiled: April 23, 2001Publication date: October 24, 2002Inventors: Richard C. Ruby, Paul Bradley, Domingo Figueredo, John D. Larson III, Yury Oshmyansky
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Publication number: 20020121405Abstract: A method for fabricating an acoustic resonator, for example a Thin Film Bulk Acoustic Resonators (FBAR), on a substrate. A depression is etched and filled with sacrificial material. The FBAR is fabricated on the substrate spanning the depression, the FBAR having an etch hole. The depression may include etch channels in which case the FBAR may include etch holes aligned with the etch channels. A resonator resulting from the application of the technique is suspended in air and includes at least one etch hole and may include etch channels.Type: ApplicationFiled: March 1, 2001Publication date: September 5, 2002Inventors: Richard C. Ruby, Paul Bradley, Yury Oshmyansky, Domingo A. Figueredo
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Patent number: 6441838Abstract: A thermal ink jet printhead that includes a thin film substrate including a plurality of thin film layers, a plurality of ink firing heater resistors defined in the plurality of thin film layers, a patterned tantalum layer disposed on said plurality of thin film layers, a barrier adhesion layer disposed on the patterned tantalum layer, an ink barrier layer disposed over the barrier adhesion layer, and respective ink chambers formed in the ink barrier layer over respective thin film resistors, each chamber formed by a chamber opening in barrier layer, the barrier adhesion layer more particularly comprises a tantalum nitride layer or a deposited tantalum, carbon, fluorine, and oxygen containing layer that is formed pursuant to exposure of the patterned tantalum layer to a plasma that includes a fluorinated hydrocarbon such as carbon tetrafluoride (CF4), fluoroform (CHF3), hexafluoroethane (C2F6), difluoromethane (CH2F2), pentafluoroethane (C2HF5), tetrafluoroethane (C2H2F4), or octafluorobutene (C4F8).Type: GrantFiled: January 19, 2001Date of Patent: August 27, 2002Assignee: Hewlett-Packard CompanyInventors: Gregory T. Hindman, Domingo A. Figueredo, Ronald L. Enck
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Patent number: 6286939Abstract: A thermal ink jet printhead that includes a thin film substrate including a plurality of thin film layers, a plurality of ink firing heater resistors defined in the plurality of thin film layers, a patterned tantalum layer disposed on said plurality of thin film layers, a barrier adhesion layer disposed on the patterned tantalum layer, an ink barrier layer disposed over the barrier adhesion layer, and respective ink chambers formed in the ink barrier layer over respective thin film resistors, each chamber formed by a chamber opening in barrier layer, the barrier adhesion layer more particularly comprises a tantalum nitride layer or a deposited tantalum, carbon, fluorine, and oxygen containing layer that is formed pursuant to exposure of the patterned tantalum layer to a plasma that includes a fluorinated hydrocarbon such as carbon tetrafluoride (CF4), fluoroform (CHF3), hexafluoroethane (C2F6), difluoromethane (CH2F2), pentafluoroethane (C2HF5), tetraf luoroethane (C2H2F4), or octafluorobutene (C4F8).Type: GrantFiled: September 26, 1997Date of Patent: September 11, 2001Assignee: Hewlett-Packard CompanyInventors: Gregory T. Hindman, Domingo A. Figueredo, Ronald L. Enck
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Patent number: 6239820Abstract: The present invention provides an ink-jet printhead substructure highly thermally efficient and greatly simplified in both the method of manufacture and resulting structure. The printhead substructure of the present invention comprises a resistor formed on an insulated substrate, a single conductive layer that provides both the conductive bonding interconnect pads and the conductive traces for the substructure, a passivation layer and a cavitation barrier. The resistor, passivation layer and cavitation barrier may comprise a single graded layer. The graded thin-film structure provides the resistor, passivation and cavitation barrier components without creating abrupt layer interfaces thereby, improving printhead reliability and durability. Fabrication of the printhead substructure of the present invention requires only two or three lithographic masks and a minimized number of sputter source materials.Type: GrantFiled: December 15, 1998Date of Patent: May 29, 2001Assignee: Hewlett-Packard CompanyInventors: Domingo A Figueredo, David R. Thomas, Mark A. Buonanno
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Patent number: 6209991Abstract: A thermal ink jet printhead that includes a thin film substrate including a plurality of thin film layers, a plurality of ink firing heater resistors defined in the plurality of thin film layers, a patterned tantalum carbide layer disposed on the plurality of thin film layers, an ink barrier layer disposed over the tantalum carbide layer, and respective ink chambers formed in the ink barrier layer over respective thin film resistors, each chamber formed by a chamber opening in barrier layer. The tantalum carbide layer forms an oxidation and wear resistance layer and/or a barrier adhesion layer.Type: GrantFiled: March 4, 1997Date of Patent: April 3, 2001Assignee: Hewlett-Packard CompanyInventors: Michael J Regan, Brian J Keefe, Ali Emamjomeh, Roger J Kolodziej, Ulrich E Hess, John P Whitlock, Domingo A Figueredo, Gregory T Hindman
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Patent number: 6155674Abstract: A thermal ink jet printhead that includes an adhesion interface between a silicon carbide layer of a thin film substrate and a polymer ink barrier layer in the vicinity of ink chambers formed in the polymer ink barrier layer, and an adhesion interface between a silicon carbide layer disposed on the ink barrier layer and an orifice plate. An intervening adhesion promoter can be located between the silicon carbide layer of the thin film substrate and the polymer ink barrier layer, and between the silicon carbide layer disposed on the ink barrier layer and the orifice plate.Type: GrantFiled: March 4, 1997Date of Patent: December 5, 2000Assignee: Hewlett-Packard CompanyInventors: Domingo A Figueredo, Gregory T Hindman, Brian J Keefe, Ali Emamjomeh, Roger J Kolodziej, Grant Allen Webster, Terri I. Chapman
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Patent number: 6153114Abstract: The present invention provides an ink-jet printhead substructure highly thermally efficient and greatly simplified in both the method of manufacture and resulting structure. The printhead substructure of the present invention comprises a resistor formed on an insulated substrate, a single conductor layer that provides both the conductive bonding interconnect pads and the conductive traces for the substructure, a passivation layer and a cavitation barrier. The resistor, passivation layer and cavitation barrier may comprise a single graded layer. The graded thin-film structure provides the resistor, passivation and cavitation barrier components without creating abrupt layer interfaces thereby, improving printhead reliability and durability. Fabrication of the printhead substructure of the present invention requires only two or three lithographic masks and a minimized number of sputter source materials.Type: GrantFiled: December 15, 1998Date of Patent: November 28, 2000Assignee: Hewlett-Packard CompanyInventors: Domingo A. Figueredo, David R. Thomas, Mark A. Buonanno
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Patent number: 5883650Abstract: The present invention provides an ink-jet printhead substructure highly thermally efficient and greatly simplified in both the method of manufacture and resulting structure. The printhead substructure of the present invention comprises a resistor formed on an insulated substrate, a single conductive layer that provides both the conductive bonding interconnect pads and the conductive traces for the substructure, a passivation layer and a cavitation barrier. The resistor, passivation layer and cavitation barrier may comprise a single graded layer. The graded thin-film structure provides the resistor, passivation and cavitation barrier components without creating abrupt layer interfaces thereby, improving printhead reliability and durability. Fabrication of the printhead substructure of the present invention requires only two or three lithographic masks and a minimized number of sputter source materials.Type: GrantFiled: December 6, 1995Date of Patent: March 16, 1999Assignee: Hewlett-Packard CompanyInventors: Domingo A. Figueredo, David R. Thomas, Mark A. Buonanno
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Patent number: 5257005Abstract: The effective parasitic end resistance of small-value precision integrated circuit resistors is reduced by providing N resistors connected in parallel and causing at least two of the resistors to share a terminal contact. The resulting integrated circuit resistor includes multiple terminal contacts of any number n greater than two. Of the n terminal contacts, N-1 terminal contacts are shared amongst said resistors. The parasitic end resistances are diminished by a factor equal to the number of resistors connected in parallel. By increasing the length of the active area of the N resistors by a factor equal to the number of the resistors, the desired resistance value remains undiminished. As a result, the parasitic end resistances may be made negligible compared to the desired resistance even for small value resistors.Type: GrantFiled: August 18, 1992Date of Patent: October 26, 1993Inventors: Alan R. Desroches, Domingo A. Figueredo
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Patent number: 5225369Abstract: A tunnel diode is disclosed having a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on a semi-insulating substrate of indium phosphide. In an alternative embodiment, a tunnel diode is disclosed which has a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on an N-doped substrate.Type: GrantFiled: November 4, 1991Date of Patent: July 6, 1993Assignee: Menlo Industries, Inc.Inventors: Chung-Yi Su, Sanehiko Kakihana, Domingo A. Figueredo
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Patent number: 5093692Abstract: A tunnel diode is disclosed having a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on a semi-insulating substrate of indium phosphide. In an alternative embodiment, a tunnel diode is disclosed which has a highly P-doped layer of indium gallium arsenide formed on a highly N-doped layer of indium gallium arsenide which is supported on an N-doped substrate.Type: GrantFiled: November 9, 1990Date of Patent: March 3, 1992Assignee: Menlo Industries, Inc.Inventors: Chung-Yi Su, Sanehiko Kakihana, Domingo A. Figueredo