Abstract: A field effect transistor (FET) wherein the field insulator is nonrecessed with respect to the source and drain regions, wherein the sides of the polysilicon gate electrode are self-aligned with respect to the nonconductive field insulator and neither overlap nor underlap the field insulator. The lateral dimensions and location of the gate correlate directly with the lateral dimensions and location of the channel region of the FET. The gate fabrication technique employed comprises delineating lithographic patterns twice in the same polysilicon layer; whereby the first lithographic pattern delineates regions to be used for sources and drains, and the next lithographic pattern forms the gate regions.

Abstract: A word line clamping circuit for use with field effect transistor memories is disclosed which permits the clamping of the word line to a reference potential using a minimum of devices and without the consumption of d.c. power so that multi-level bit line potentials may be utilized during the memory cycle. This is achieved by connecting a field effect transistor (FET) between word line and ground under control of a word line decoder so that a node associated with the last mentioned FET is held in either an uncharged or charged condition depending on whether the decoder is selecting its associated word line or not selecting it.

Abstract: A differential charge transfer amplifier which functions as a sensing and regenerating circuit responsive to binary information represented by the level of charge in a stored charge memory cell is disclosed. The sense amplifier includes a pair of dummy cells and bucket brigade amplifiers which are connected on either side of a dynamic latching circuit which includes a plurality of actuable gate devices, which may be field effect transistors. A bit/sense line of the array is divided into two equal sections which are respectively connected to either side of the sense amplifier. The operation of the amplifier is cyclic, including a precharge period, a sensing period, a rewrite period and a restore period, after which the amplifier is in its original state. A feature of the amplifier is that it consumes no d.c. power other than leakage and has high sensitivity due to a charge transfer feature.