Abstract: The described techniques address issues associated with coreless current sensors by implementing a current sensor solution that may use as few as two, two-dimensional (2D) linear sensors. The discussed techniques provide a coreless current sensor solution that is independent of the sensor position with respect to a current-carrying conductor. An algorithm is also described for auto-calibration of sensor position with respect to a current-carrying conductor to calculate the current flowing through the conductor. The calculation of current may be performed independent of the position of the current-carrying conductor with respect to the sensor, and thus the disclosed techniques provide additional advantages regarding installation flexibility without sacrificing measurement accuracy.

Abstract: The described techniques address issues associated with coreless current sensors by implementing a current sensor solution that may use as few as two, two-dimensional (2D) linear sensors. The discussed techniques provide a coreless current sensor solution that is independent of the sensor position with respect to a current-carrying conductor. An algorithm is also described for auto-calibration of sensor position with respect to a current-carrying conductor to calculate the current flowing through the conductor. The calculation of current may be performed independent of the position of the current-carrying conductor with respect to the sensor, and thus the disclosed techniques provide additional advantages regarding installation flexibility without sacrificing measurement accuracy.

Abstract: Executable code is generated for processing a data set in an in-memory database system. The executable code is based on program instructions including a predicate associated with a first part of the data set. The first part of the data set is divided into data sections. A data section comprises a number of data elements corresponding to a number of bit values to be allocated into a register at a processor. The register at the processor is associated with performing single instructions on multiple data. At the processor, the data sections are evaluated iteratively to determine bit vectors to be stored iteratively into the SIMD register. Based on the iteratively stored bit vectors at SIMD register at the processor, result data sets are iteratively determined through invoking data from the data set. The result data sets are provided through the processor for further consumption.

Abstract: Executable code is generated for processing a request including a predicate associated with a column of a database table. The executable code defines how to process data through a register at the processor associated with single instructions on multiple data. When a number of bit values of the register at the processor is not an aliquot part of a count of rows in the column of the database table, a new column is loaded in the main memory to include the column of the database table and additional number of data elements. The number of bit values of a register section of the register is an aliquot part of a number of elements of the new column. The new loaded column is evaluated iteratively to determine result bit vectors to be loaded in the register. At the processor, result data is determined to correspond to the evaluated section.

Abstract: Executable code is generated for processing a request including a predicate associated with a column of a database table. The executable code defines how to process data through a register at the processor associated with single instructions on multiple data. When a number of bit values of the register at the processor is not an aliquot part of a count of rows in the column of the database table, a new column is loaded in the main memory to include the column of the database table and additional number of data elements. The number of bit values of a register section of the register is an aliquot part of a number of elements of the new column. The new loaded column is evaluated iteratively to determine result bit vectors to be loaded in the register. At the processor, result data is determined to correspond to the evaluated section.

Abstract: Executable code is generated for processing a data set in an in-memory database system. The executable code is based on program instructions including a predicate associated with a first part of the data set. The first part of the data set is divided into data sections. A data section comprises a number of data elements corresponding to a number of bit values to be allocated into a register at a processor. The register at the processor is associated with performing single instructions on multiple data. At the processor, the data sections are evaluated iteratively to determine bit vectors to be stored iteratively into the SIMD register. Based on the iteratively stored bit vectors at SIMD register at the processor, result data sets are iteratively determined through invoking data from the data set. The result data sets are provided through the processor for further consumption.