Abstract: A low power reconfigurable processor core includes one or more processing units, each unit having a clock input that controls the performance of the unit; a wireless transceiver transmitting and receiving at a frequency based on a wireless clock input; and a controller having a plurality of clock outputs each coupled to the clock inputs of the processing units and the wireless clock input, the clock outputs being generated from a common master clock.

Abstract: Systems and methods wirelessly communicate data over a plurality of cellular channels by requesting an allocation of cellular frequency channels from a mobile station to a base station; allocating available frequency channels in response to the request from the mobile station; and bonding the available frequency channels to communicate data.

Abstract: Systems and methods are disclosed for parallel testing one or more wireless devices using a single wireless command, each device including a processor and memory coupled to the processor. The system includes a tester adapted to exercise the wireless devices, including: a transceiver adapted to communicate with each wireless device; and a computer coupled to the transceiver, the computer adapted to test all wireless devices in parallel by issuing a single test command using a wireless signal, the computer adapted to store test patterns and test results.

Abstract: An method of creating a physical layout of an integrated circuit. A schematic file (600) is mapped directly to a physical layout using the location of elements and routing of interconnections as specified in the schematic file (600). The method takes advantage of constraints on the schematic design to provide the layout file (675) quickly, without complex routing programs. Design rules violations are anticipated and corrected in some cases. In other cases, the design rule violations are annotated, if the designer intentionally placed them in the design.

Abstract: A device comprising: a layer of gate oxide on a surface of the semiconductor substrate; a gate electrode formed on the surface of the gate oxide, the gate electrode having a drain side; a p-well implanted within a semiconductor substrate under the gate electrode; an n-well implanted in the p-well on the drain side; an n+ source region in the p-well outside of the n-well; an n+ drain region within the substrate inside the n-well; and lightly doped regions extending respectively from the source and drain regions toward the gate electrode.

Abstract: A power-generating active-matrix display includes a first region having a plurality of solar cells arranged in a matrix; and a second region having a plurality of thin film transistors, each of which is associated with a pixel electrode and wherein the solar cells overlie respective pixel electrodes.

Abstract: A multi-mode wireless device on a single substrate includes an analog portion and a digital portion integrated on the single substrate. The analog portion includes a cellular radio core; and a short-range wireless transceiver core. The digital portion integrated on the substrate includes a reconfigurable processor core coupled to the cellular radio core and the short-range wireless transceiver core, the reconfigurable processor adapted to handle a plurality of wireless communication protocols. The digital portion also includes a high-density memory array core coupled to the reconfigurable multi-processor core.

Abstract: An method and apparatus for high voltage control of isolation region transistors (320) in an integrated circuit. Isolation region transistors (320) are formed between active devices by selective implantation of channel stop implants (140). Isolation region transistors (320) are those areas with a conductor (130) over an isolation region (120) with no channel stop implant (140). This provides an isolation region transistor (320) with a lower threshold voltage than the areas with channel stop implant (140). The voltage threshold of the isolation region transistors 320 are adjustable to a range of voltages by varying the length of channel stop implant (140). The apparatus may be fabricated using conventional fabrication processes.

Abstract: A digital camera that operates inside and in conjunction with a non-digital camera, enabling the user to continue to use the non-digital camera, controls and associated lens, flashes, etc. The digital camera includes an imager which senses the image to be recorded and a light detector which detects the existence of light due to the opening of the shutter aperture of the non-digital camera. The light detector controls the imager such that an image is recorded and output from the imager when the light detector detects the opening of the shutter aperture which occurs when the photographer depresses the shutter button to take a picture. Preferably the digital camera includes a memory for storage of the images recorded. These images can then be subsequently output to an external device for further processing or display.

Abstract: An apparatus and method of providing a printed wiring board is disclosed. The printed circuit board comprises a printed wiring board that has at least one opening. The printed circuit board further comprises a circuit component that is located within the opening and is electrically connected to the printed wiring board. Various embodiments are disclosed.