Abstract: The invention relates to an N-bit digital-to-analogue converter with an output voltage range and configured to provide as output an output voltage based on digital data received as input. The N-bit digital-to-analogue converter comprises at least one register, comprising an output data register having at least N bits and M enhancement bits, wherein the N-bit digital-to-analogue converter is configured to store the received digital data in the output data register and in the M enhancement bits; an evaluation logic configured to provide at least one binary evaluation signal derived from the received digital data; and a converter configured to receive the at least one binary evaluation signal, with the converter having access to the output data register and being configured to provide the output voltage based on the output data register and the received at least one binary evaluation signal.

Abstract: A modular intermediate circuit for a power converter has at least two or more intermediate circuit capacitor modules connected in parallel and in a chain, each intermediate circuit capacitor module having a first terminal, a second terminal, and at least one first intermediate circuit capacitor, which is electrically connected with the first terminal and the second terminal. First terminals of the intermediate circuit capacitor modules each following immediately one after another in the chain are connected in each case through a first low-resistance, high-inductance connection and a first high-resistance, low-inductance connection that is connected in parallel thereto. Second terminals of the intermediate circuit capacitor modules each following immediately one after another in the chain are connected in each case through a second low-resistance, high-inductance connection and a second high-resistance, low-inductance connection that is connected in parallel thereto.

Abstract: A power converter includes a PFC circuit, a first capacitor, a second capacitor and an auxiliary circuit. The PFC circuit provides a first intermediate voltage to the first capacitor. The auxiliary circuit includes a first auxiliary branch circuit and a second auxiliary branch circuit. When the first auxiliary branch circuit is enabled, and the first intermediate voltage is transmitted to the second capacitor through the first auxiliary branch circuit. When the second auxiliary branch circuit is enabled, the first intermediate voltage is boosted by the second auxiliary branch circuit, so that a second intermediate voltage is provided by the second capacitor. While an operation state of the load is switched between a light load condition and a heavy load condition, one of the first auxiliary branch circuit and the second auxiliary branch circuit is selectively enabled.

Abstract: A power converter includes a PFC circuit, a first capacitor, a second capacitor and an auxiliary circuit. The PFC circuit provides a first intermediate voltage to the first capacitor. The auxiliary circuit includes a first auxiliary branch circuit and a second auxiliary branch circuit. When the first auxiliary branch circuit is enabled, and the first intermediate voltage is transmitted to the second capacitor through the first auxiliary branch circuit. When the second auxiliary branch circuit is enabled, the first intermediate voltage is boosted by the second auxiliary branch circuit, so that a second intermediate voltage is provided by the second capacitor. While an operation state of the load is switched between a light load condition and a heavy load condition, one of the first auxiliary branch circuit and the second auxiliary branch circuit is selectively enabled.

Abstract: A modular intermediate circuit for a power converter has at least two or more intermediate circuit capacitor modules connected in parallel and in a chain, each intermediate circuit capacitor module having a first terminal, a second terminal, and at least one first intermediate circuit capacitor, which is electrically connected with the first terminal and the second terminal. First terminals of the intermediate circuit capacitor modules each following immediately one after another in the chain are connected in each case through a first low-resistance, high-inductance connection and a first high-resistance, low-inductance connection that is connected in parallel thereto. Second terminals of the intermediate circuit capacitor modules each following immediately one after another in the chain are connected in each case through a second low-resistance, high-inductance connection and a second high-resistance, low-inductance connection that is connected in parallel thereto.

Abstract: A method for phase compensating a power factor correction circuit is provided. Firstly, a present current value of an input current is sampled, and the sampled signal is filtered. Then, a present waveform of the input current corresponding to the present current value of the filtered sampled signal and a previous waveform of the input current corresponding to a previous current value of the filtered sampled signal are predicted, and a current error signal is generated according to a difference between the present waveform and the previous waveform. Then, the current error signal is adjusted, and an adjusted signal is generated. Then, a feedforward signal is added to the adjusted signal, and a phase compensation signal. Then, a current control signal is added to the phase compensation signal, and a pulse width modulation signal is generated to control a switching circuit.

Abstract: A method for phase compensating a power factor correction circuit is provided. Firstly, a present current value of an input current is sampled, and the sampled signal is filtered. Then, a present waveform of the input current corresponding to the present current value of the filtered sampled signal and a previous waveform of the input current corresponding to a previous current value of the filtered sampled signal are predicted, and a current error signal is generated according to a difference between the present waveform and the previous waveform. Then, the current error signal is adjusted, and an adjusted signal is generated. Then, a feedforward signal is added to the adjusted signal, and a phase compensation signal. Then, a current control signal is added to the phase compensation signal, and a pulse width modulation signal is generated to control a switching circuit.

Abstract: A compensating method for a ripple compensation circuit of a power supply is provided. The power supply includes an LLC resonant converter. The LLC resonant converter receives an input voltage and generates an output voltage. Firstly, the output voltage is subtracted from a reference voltage, so that a first error signal is generated. Then, a digital filter is provided to increase a low frequency gain of the first error signal, so that a second error signal is generated. Then, the first error signal and the second signal are added, so that a modulated error signal is generated. Then, a compensation signal is generated to control the LLC resonant converter according to the modulated error signal. Consequently, a low frequency gain of the input voltage is increased and a low frequency ripple of the output voltage is suppressed by an increased voltage loop compensator response.

Abstract: A compensating method for a ripple compensation circuit of a power supply is provided. The power supply includes an LLC resonant converter. The LLC resonant converter receives an input voltage and generates an output voltage. Firstly, the output voltage is subtracted from a reference voltage, so that a first error signal is generated. Then, a digital filter is provided to increase a low frequency gain of the first error signal, so that a second error signal is generated. Then, the first error signal and the second signal are added, so that a modulated error signal is generated. Then, a compensation signal is generated to control the LLC resonant converter according to the modulated error signal. Consequently, a low frequency gain of the input voltage is increased and a low frequency ripple of the output voltage is suppressed by an increased voltage loop compensator response.