Abstract: An isolation system, isolation device, and Integrated Circuit are disclosed. The isolation system is described to include an integrated circuit chip having a first capacitive plate, a second capacitive plate positioned with respect to the first capacitive plate to enable a capacitive coupling therebetween, an enhanced isolation layer positioned between the first capacitive the second capacitive plate that facilitates an electrical isolation between the first capacitive plate and the second capacitive plate, a first bonding wire that is in electrical communication with the second capacitive plate, and an isolation trench that at least partially circumscribes the first capacitive plate and is positioned between the first capacitive plate and the first bonding wire.

Abstract: A coupler is disclosed that employs hall-effect sensing technology. Specifically, the coupler is configured to produce an output voltage by converting the magnetic field generated by a current conductor at an input side. The output and input sides may be electrically isolated from one another but may be coupled via the hall-effect sensing technology, such as a hall-effect sensor. The output and input sides may be provided in an overlapping configuration.

Abstract: An isolation system, isolation device, and Integrated Circuit are disclosed. The isolation system is described to include an integrated circuit chip having a first capacitive plate, a second capacitive plate positioned with respect to the first capacitive plate to enable a capacitive coupling therebetween, an enhanced isolation layer positioned between the first capacitive the second capacitive plate that facilitates an electrical isolation between the first capacitive plate and the second capacitive plate, a first bonding wire that is in electrical communication with the second capacitive plate, and an isolation trench that at least partially circumscribes the first capacitive plate and is positioned between the first capacitive plate and the first bonding wire.

Abstract: A capacitive isolation system, capacitive isolator, and method of operating the same are disclosed. The capacitive isolation system is described to include a first semiconductor die and a second semiconductor die each having capacitive elements established thereon and positioned in a face-to-face configuration. An isolation layer is provided between the first and second semiconductor die so as to establish an isolation boundary therebetween. Capacitive coupling is used to carry information across the isolation boundary.

Abstract: An isolation system, isolation device, and Integrated Circuit are disclosed. The isolation system is described to include an integrated circuit chip having a first capacitive plate, a second capacitive plate positioned with respect to the first capacitive plate to enable a capacitive coupling therebetween, an enhanced isolation layer positioned between the first capacitive the second capacitive plate that facilitates an electrical isolation between the first capacitive plate and the second capacitive plate, a first bonding wire that is in electrical communication with the second capacitive plate, and an isolation trench that at least partially circumscribes the first capacitive plate and is positioned between the first capacitive plate and the first bonding wire.

Abstract: An isolation system, isolation device, and Integrated Circuit are disclosed. The isolation system is described to include an integrated circuit chip having a first capacitive plate, a second capacitive plate positioned with respect to the first capacitive plate to enable a capacitive coupling therebetween, an enhanced isolation layer positioned between the first capacitive the second capacitive plate that facilitates an electrical isolation between the first capacitive plate and the second capacitive plate, a first bonding wire that is in electrical communication with the second capacitive plate, and an isolation trench that at least partially circumscribes the first capacitive plate and is positioned between the first capacitive plate and the first bonding wire.

Abstract: A coupler is disclosed that employs hall-effect sensing technology. Specifically, the coupler is configured to produce an output voltage by converting the magnetic field generated by a current conductor at an input side. The output and input sides may be electrically isolated from one another but may be coupled via the hall-effect sensing technology, such as a hall-effect sensor. The output and input sides may be provided in an overlapping configuration.

Abstract: An isolation system, isolation device, and Integrated Circuit are disclosed. The isolation system is described to include an integrated circuit chip having a first capacitive plate, a second capacitive plate positioned with respect to the first capacitive plate to enable a capacitive coupling therebetween, an enhanced isolation layer positioned between the first capacitive the second capacitive plate that facilitates an electrical isolation between the first capacitive plate and the second capacitive plate, a first bonding wire that is in electrical communication with the second capacitive plate, and an isolation trench that at least partially circumscribes the first capacitive plate and is positioned between the first capacitive plate and the first bonding wire.

Abstract: An isolation system, isolation capacitor, and Integrated Circuit are disclosed. The isolation capacitor is described to include a first capacitive element, a second capacitive element, a primary isolation layer positioned between the first and second capacitive elements, as well as a secondary isolation layer positioned between the first and second capacitive elements. The secondary isolation layer has an area that is larger than an area of one or both of the first and second capacitive elements, thereby reducing the likelihood of breakdown between the first and second capacitive elements.

Abstract: A capacitive isolation system, capacitive isolator, and method of operating the same are disclosed. The capacitive isolation system is described to include a first semiconductor die and a second semiconductor die each having capacitive elements established thereon and positioned in a face-to-face configuration. An isolation layer is provided between the first and second semiconductor die so as to establish an isolation boundary therebetween. Capacitive coupling is used to carry information across the isolation boundary.

Abstract: An optoelectronic device is disclosed. The optoelectronic device may be employed as a single or multi-channel opto-coupler that electrically isolates one circuit from another circuit. The opto-coupler may include one or more premolded cavities with a light-coupling medium contained therein. Walls of the one or more premolded cavities advantageously help shape the light-coupling medium during manufacture, therefore, resulting in a light path with controlled shape and dimensions.

Abstract: A coupler is disclosed that employs hall-effect sensing technology. Specifically, the coupler is configured to produce an output voltage by converting the magnetic field generated by a current conductor at an input side. The output and input sides may be electrically isolated from one another but may be coupled via the hall-effect sensing technology, such as a hall-effect sensor.

Abstract: An optoelectronic device is disclosed. The optoelectronic device may be employed as a single or multi-channel opto-coupler that electrically isolates one circuit from another circuit. The opto-coupler may include one or more premolded cavities with a light-coupling medium contained therein. Walls of the one or more premolded cavities advantageously help shape the light-coupling medium during manufacture, therefore, resulting in a light path with controlled shape and dimensions.

Abstract: A coupler is disclosed that employs hall-effect sensing technology. Specifically, the coupler is configured to produce an output voltage by converting the magnetic field generated by a current conductor at an input side. The output and input sides may be electrically isolated from one another but may be coupled via the hall-effect sensing technology, such as a hall-effect sensor.

Abstract: Disclosed herein are various embodiments of widebody coil isolators containing multiple coil transducers, where integrated circuits are not stacked vertically over the coil transducers. The disclosed coil isolators provide high voltage isolation and high voltage breakdown performance characteristics in small packages that provide a high degree of functionality at a low price.

Abstract: Disclosed herein are various embodiments of narrowbody coil isolators containing multiple coil transducers, where integrated circuits are not stacked vertically over the coil transducers. The disclosed coil isolators provide high voltage isolation and high voltage breakdown performance characteristics in small packages that provide a high degree of functionality at a low price.

Abstract: In an embodiment, the invention provides a coil transducer isolator package comprising at least one lead frame, at least two integrated circuits (ICs) and a flex circuit comprising at least a first coil transducer. The first coil transducer comprises at least one metal coil. The coil transducer isolator package is fabricated such that no portion of the lead frame is physically located within a spatial volume extending substantially perpendicular to the at least one metal coil. The boundaries of the spatial volume are defined by a periphery of the at least one metal coil. At least one of the two ICs is at least partially located within the spatial volume extending substantially perpendicular to the at least one metal coil.

Abstract: In an embodiment, the invention provides a coil transducer isolator package comprising at least one lead frame, at least two integrated circuits (ICs) and a flex circuit comprising at least a first coil transducer. The first coil transducer comprises at least one metal coil. The coil transducer isolator package is fabricated such that no portion of the lead frame is physically located within a spatial volume extending substantially perpendicular to the at least one metal coil. The boundaries of the spatial volume are defined by a periphery of the at least one metal coil. At least one of the two ICs is at least partially located within the spatial volume extending substantially perpendicular to the at least one metal coil.

Abstract: Disclosed herein are various embodiments of widebody coil isolators containing multiple coil transducers, where integrated circuits are not stacked vertically over the coil transducers. The disclosed coil isolators provide high voltage isolation and high voltage breakdown performance characteristics in small packages that provide a high degree of functionality at a low price.

Abstract: Disclosed herein are various embodiments of narrowbody coil isolators containing multiple coil transducers, where integrated circuits are not stacked vertically over the coil transducers. The disclosed coil isolators provide high voltage isolation and high voltage breakdown performance characteristics in small packages that provide a high degree of functionality at a low price.