Patents by Inventor Dominique Rigal

Dominique Rigal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11621906
    Abstract: Disclosed is a method for test traffic generation, at test-sending switches for a network of calculation nodes, and of inspection of this test traffic, at test-receiving switches of this network, including: the generation and sending of test traffic, at least at a selected test-sending input or output port of one selected test-sending switch, sent to at least one selected test-receiving input or output port of a selected test-receiving switch, where the test traffic is generated and sent by a traffic generation component configured as an additional input of the selected test-sending input or output port, where the test traffic is inspected by a traffic inspection component configured for filtering the output of the selected test-receiving input or output port.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: April 4, 2023
    Assignee: BULL SAS
    Inventors: Vivian Blanchard, Laurent Marliac, Dominique Rigal, Pierre Axel Lagadec
  • Patent number: 11016915
    Abstract: A method for sending data, from an upstream device to a downstream device, including sending a piece of data from one among a plurality of virtual channels sharing the same input buffer memory of the downstream device, if this virtual channel uses a number of memory locations of the input buffer memory strictly less than a current ceiling. It further comprises measuring a communication latency between the upstream and downstream devices, and calculating the current ceiling from the measured latency.
    Type: Grant
    Filed: May 21, 2019
    Date of Patent: May 25, 2021
    Assignee: BULL SAS
    Inventors: Pierre Axel Lagadec, Saïd Derradji, Dominique Rigal, Laurent Marliac
  • Publication number: 20190361822
    Abstract: A method for sending data, from an upstream device to a downstream device, including sending a piece of data from one among a plurality of virtual channels sharing the same input buffer memory of the downstream device, if this virtual channel uses a number of memory locations of the input buffer memory strictly less than a current ceiling. It further comprises measuring a communication latency between the upstream and downstream devices, and calculating the current ceiling from the measured latency.
    Type: Application
    Filed: May 21, 2019
    Publication date: November 28, 2019
    Inventors: Pierre Axel LAGADEC, Saïd DERRADJI, Dominique RIGAL, Laurent MARLIAC
  • Publication number: 20180302313
    Abstract: Disclosed is a method for test traffic generation, at test-sending switches for a network of calculation nodes, and of inspection of this test traffic, at test-receiving switches of this network, including: the generation and sending of test traffic, at least at a selected test-sending input or output port of one selected test-sending switch, sent to at least one selected test-receiving input or output port of a selected test-receiving switch, where the test traffic is generated and sent by a traffic generation component configured as an additional input of the selected test-sending input or output port, where the test traffic is inspected by a traffic inspection component configured for filtering the output of the selected test-receiving input or output port.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 18, 2018
    Inventors: Vivian BLANCHARD, Laurent MARLIAC, Dominique RIGAL, Pierre Axel LAGADEC
  • Publication number: 20140308261
    Abstract: This invention concerns HY epitopic polypeptides specifically presented by the HLA-DR7 molecule, a method for preparing these epitopic polypeptides, isolated T-lymphocytes capable of specifically recognizing an epitope from these polypeptides or from a polypeptide comprising the complete sequence of the protein encoded by the RPS4Y gene and presented by the HLA-DR7 molecule expressed on the surface of antigen-presenting cells, a method for preparing these T-lymphocytes, as well as the use of these epitopic polypeptides and these T-lymphocytes as medicaments, in particular for the treatment of cancers of immune cells.
    Type: Application
    Filed: November 21, 2012
    Publication date: October 16, 2014
    Inventors: Assia El Jaafari, Dominique Rigal, Diane Scott
  • Patent number: 8563704
    Abstract: The present invention relates to a peptide aptamer which mimics particularly the human platelet antigen HPA-Ia epitope present on the platelet GPIIb/IIIa molecules and which is capable of neutralizing the binding of HPA-I a specific antibodies (anti-HPA-1 a). This peptide aptamer is advantageously used in a method for detecting and identifying HPA-I a specific antibodies in human serum, in a diagnostic kit for screening and identifying antibodies, in an immunoassay and a pharmaceutical composition.
    Type: Grant
    Filed: April 18, 2012
    Date of Patent: October 22, 2013
    Assignee: Stiftung für Diagnostische Forschung
    Inventors: Dominique Rigal, Julien Thibaut, Gemain Gillet, Yves Merieux
  • Publication number: 20120245338
    Abstract: The present invention relates to a peptide aptamer which mimics particularly the human platelet antigen HPA-Ia epitope present on the platelet GPIIb/IIIa molecules and which is capable of neutralizing the binding of HPA-I a specific antibodies (anti-HPA-1 a). This peptide aptamer is advantageously used in a method for detecting and identifying HPA-I a specific antibodies in human serum, in a diagnostic kit for screening and identifying antibodies, in an immunoassay and a pharmaceutical composition.
    Type: Application
    Filed: April 18, 2012
    Publication date: September 27, 2012
    Applicant: STIFTUNG FUR DIAGNOSTISCHE FORSCHUNG
    Inventors: Dominique Rigal, Julien Thibaut, Gemain Gillet, Yves Merieux
  • Patent number: 8183055
    Abstract: The present invention relates to a peptide aptamer which mimics particularly the human platelet antigene HPA-Ia epitope present on the platelet GPIIb/IIIa molecules and which is capable of neutralizing the binding of HPA-I a specific antibodies (anti-HPA-1 a). This peptide aptamer is advantageously used in a method for detecting and identifying HPA-I a specific antibodies in human serum, in a diagnostic kit for screening and identifying antibodies, in an immunoassay and a pharmaceutical composition.
    Type: Grant
    Filed: February 7, 2007
    Date of Patent: May 22, 2012
    Assignee: Stiftung für Diagnostische Forschung
    Inventors: Dominique Rigal, Julien Thibaut, Gemain Gillet, Yves Merieux
  • Patent number: 8080242
    Abstract: The present invention relates to a monoclonal antibody selectively recognizing a human platelet alloantigen, a method for detecting the presence or absence of at least one human platelet alloantigen using said antibody, a method for the production of said antibody, a pharmaceutical composition comprising said antibody, and a kit containing said antibody.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: December 20, 2011
    Assignee: Stiftung Für Diagnostische Forschung
    Inventors: Dominique Rigal, Jean Jacques Pin, Yves Merieux
  • Publication number: 20090318363
    Abstract: The present invention relates to a peptide aptamer which mimics particularly the human platelet antigene HPA-Ia epitope present on the platelet GPIIb/IIIa molecules and which is capable of neutralizing the binding of HPA-I a specific antibodies (anti-HPA-1 a). This peptide aptamer is advantageously used in a method for detecting and identifying HPA-I a specific antibodies in human serum, in a diagnostic kit for screening and identifying antibodies, in an immunoassay and a pharmaceutical composition.
    Type: Application
    Filed: February 7, 2007
    Publication date: December 24, 2009
    Applicant: STIFTUNG FUR DIAGNOSTISCHE FORSCHUNG
    Inventors: Dominique Rigal, Julien Thibaut, Gemain Gillet, Yves Merieux
  • Publication number: 20090117128
    Abstract: The present invention relates to a monoclonal antibody selectively recognizing a human platelet alloantigen, a method for detecting the presence or absence of at least one human platelet alloantigen using said antibody, a method for the production of said antibody, a pharmaceutical composition comprising said antibody, and a kit containing said antibody.
    Type: Application
    Filed: June 13, 2008
    Publication date: May 7, 2009
    Applicant: Stiftung fur Diagnostische
    Inventors: Dominique Rigal, Jean Jacques Pin, Yves Merieux
  • Patent number: 6982958
    Abstract: A method and system for transmitting a loopback cell within an ATM connection. The method comprises the steps of detecting in an input adapter whether or not an incoming ATM cell includes a loopback condition indicator. If so, specific routing labels are appended to the incoming ATM cell indicating that the incoming cell is a loopback cell to be looped back on the connection such that the switch engine of the switching node transfers the loopback cell to the same port of the input adapter utilizing the appended routing labels.
    Type: Grant
    Filed: January 3, 2001
    Date of Patent: January 3, 2006
    Assignee: International Business Machines Corporation
    Inventors: Jose Iruela, Daniel Orsatti, Bruno Rene Rousseau, Dominique Rigal, Jean Claude Zunino
  • Patent number: 6907007
    Abstract: A method and system for injecting/extracting a control cell into/from a data connection transmitted from a source switching node to a destination switching node of an Asynchronous Transfer Mode (ATM) network. The injecting method consists in adding to the ATM cell a switch routing label (SRL) and a protocol engine correlator (PEC) by the control point of the injection switching node before injecting the cell into the connection. The extracting method consists in setting a control flag in the control block of the incoming cell if this cell includes an extraction condition indicating that it is a control cell to be extracted, and adding to the control cell a switch routing label corresponding to the control point (CP SRL) and a reserved static protocol engine correlator (SPEC).
    Type: Grant
    Filed: January 19, 2001
    Date of Patent: June 14, 2005
    Assignee: International Business Machines Corporation
    Inventors: Ange Aznar, Claude Basso, Mathieu Girard, Daniel Orsatti, Dominique Rigal, Jean-Claude Zunino
  • Publication number: 20040152191
    Abstract: The invention concerns methods for maturation of dendritic cells by contacting them with RU 41740 or a compound analogous to RU 41740. The maturation of dendritic cells contacted with RU 41740, or analogues thereof, can be characterized by their functional properties and their phenotypic properties.
    Type: Application
    Filed: July 10, 2003
    Publication date: August 5, 2004
    Applicant: L C O Sante
    Inventors: Dominique Rigal, Daniel Masseau
  • Patent number: 6772371
    Abstract: A system and method for freezing a processing unit to facilitate on-line debugging of a protocol engine within a switching node of a data transmission network. In accordance with the system of the present invention, the protocol engine includes a plurality of processing units such as an identification unit, a lookup unit, a traffic management and congestion unit, an enqueue unit, a dequeue unit, a traffic management scheduling unit, a frame transmission unit, a control unit, and a control block unit. The control block unit includes a freeze register containing multiple freeze bits, wherein each freeze bit is associated with one processing unit. In response to setting a freeze bit, resources and settings of a processing unit associated with the set freeze bit are prevented from being changed by the processing unit.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: August 3, 2004
    Assignee: International Business Machines Corporation
    Inventors: Daniel Orsatti, Dominique Rigal, Bruno Rousseau, Jean-Claude Zunino
  • Patent number: 6680951
    Abstract: A system and method for selecting one port among multiple output ports having various transmission rates attached to an output adapter of a switching node in a data transmission network and enabling it to transmit its data over the network. The system of the present invention includes a storage device that contains a list of identification codes for the ports. The identification code list is arranged in a prioritized order from the port having the highest transmission rate to the port having the lowest transmission rate. The system further includes port service request means that generate a service request signal for each port, wherein the service request signal has a frequency corresponding to the transmission rate of the object port.
    Type: Grant
    Filed: October 18, 2000
    Date of Patent: January 20, 2004
    Assignee: International Business Machines Corporation
    Inventors: Ange Aznar, Jose Iruela, Daniel Orsatti, Dominique Rigal
  • Publication number: 20010015959
    Abstract: A method and system for transmitting a loopback cell within an ATM connection. The method comprises the steps of detecting in an input adapter whether or not an incoming ATM cell includes a loopback condition indicator. If so, specific routing labels are appended to the incoming ATM cell indicating that the incoming cell is a loopback cell to be looped back on the connection such that the switch engine of the switching node transfers the loopback cell to the same port of the input adapter utilizing the appended routing labels.
    Type: Application
    Filed: January 3, 2001
    Publication date: August 23, 2001
    Applicant: International Business Machines Corporation
    Inventors: Jose Iruela, Daniel Orsatti, Bruno Rene Rousseau, Dominique Rigal, Jean Claude Zunino
  • Publication number: 20010009549
    Abstract: A method and system for injecting/extracting a control cell into/from a data connection transmitted from a source switching node to a destination switching node of an Asynchronous Transfer Mode (ATM) network. The injecting method consists in adding to the ATM cell a switch routing label (SRL) and a protocol engine correlator (PEC) by the control point of the injection switching node before injecting the cell into the connection. The extracting method consists in setting a control flag in the control block of the incoming cell if this cell includes an extraction condition indicating that it is a control cell to be extracted, and adding to the control cell a switch routing label corresponding to the control point (CP SRL) and a reserved static protocol engine correlator (SPEC).
    Type: Application
    Filed: January 19, 2001
    Publication date: July 26, 2001
    Applicant: International Business Machines Corporation
    Inventors: Ange Aznar, Claude Basso, Mathieu Girard, Daniel Orsatti, Dominique Rigal, Jean-Claude Zunino
  • Patent number: 6003060
    Abstract: The invention discloses a method and an apparatus for use in high speed networks such as Asynchronous Transfer Mode (ATM) networks providing support for processing multipriority data flows at media speed, the major constraint being to share the storage and the ALU between all the tasks. The invention consists first in grouping the tasks in processes and the processes in set of processes all organized in decreasing order of their priority ; `on the fly`interruption of a lower priority process/set of processes by a higher priority process/set of processes is possible as well as reuse of the shared resources during task void states inactive in a process or between processes.In the preferred embodiment of the invention, the support of the reserved bandwidth and non reserved bandwidth ATM services data flows requires two different groups of processes, the highest priority being for the group of processes serving the reserved bandwidth service.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: December 14, 1999
    Assignee: International Business Machines Corporation
    Inventors: Ange Aznar, Jean Calvignac, Daniel Orsatti, Dominique Rigal, Fabrice Verplanken
  • Patent number: 5768273
    Abstract: An ATM switch includes one or more adapters having input ports and/or output ports and a switching fabric for switching Asynchronous Transfer Mode (ATM) cells received at the input ports to the output ports. To maintain switch throughput, cells are categorized either as real time (high priority) or non-real time (lower priority) cells. High priority cells are processed using a first set of cell processing logic at a rate at least equal to the rate at which the cells are received on the input ports. Lower priority cells are processed using a second set of cell processing logic only when no high priority cells are being processed.
    Type: Grant
    Filed: November 1, 1995
    Date of Patent: June 16, 1998
    Assignee: International Business Machines Corporation
    Inventors: Ange Aznar, Jean Calvignac, Daniel Orsatti, Dominique Rigal, Fabrice Verplanken