Abstract: An associative memory support for a data processing system includes an associative memory device containing n-cells. A controller is provided for issuing an instruction to the associative memory device. A clock device outputs a synchronizing clock signal that includes a predetermined number of clock cycles per second, the clock device outputting the synchronizing clock signal to the associative memory device and the controller. The controller globally communicates the instruction to all of the n-cells simultaneously, within one of the clock cycles and the instruction is applied equally to each of the n-cells.

Abstract: An associative memory support for a data processing system includes an associative memory device containing n-cells. A controller is provided for issuing an instruction to the associative memory device. A clock device outputs a synchronizing clock signal that includes a predetermined number of clock cycles per second, the clock device outputting the synchronizing clock signal to the associative memory device and the controller. The controller globally communicates the instruction to all of the n-cells simultaneously, within one of the clock cycles and the instruction is applied equally to each of the n-cells.

Abstract: A memory engine combines associative memory and random-access memory for enabling fast string search, insertion, and deletion operations to be performed on data and includes a memory device for temporarily storing the data as a string of data characters. A controller is utilized for selectively outputting one of a plurality of commands to the memory device and receives data feedback therefrom, the memory device inspects data characters in the string in accordance with the commands outputted by the controller. A clock device is also utilized for outputting a clock signal comprised of a predetermined number of clock cycles per second to the memory device and the controller, the memory device inspecting and selectively manipulating one of the data characters within one of the clock cycles.

Abstract: A memory engine combines associative memory and random-access memory for enabling fast string search, insertion, and deletion operations to be performed on data and includes a memory device for temporarily storing the data as a string of data characters. A controller is utilized for selectively outputting one of a plurality of commands to the memory device and receives data feedback therefrom, the memory device inspects data characters in the string in accordance with the commands outputted by the controller. A clock device is also utilized for outputting a clock signal comprised of a predetermined number of clock cycles per second to the memory device and the controller, the memory device inspecting and selectively manipulating one of the data characters within one of the clock cycles.