Patents by Inventor Don A. Tiffin

Don A. Tiffin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6191032
    Abstract: It has been observed that Si introduced into an Al metal line of an Al, Ti, and Si-containing layer stack of an integrated circuit, at concentrations uniformly less than the solid solubility of Si in Al, results in a reduction in Al metal line voiding. Such voiding is a stress induced phenomenon and the introduction of Si appears to reduce stresses in the Al metal lines. By controlling Ti deposition conditions to achieve desired thickness and grain-size characteristics of the Ti underlayer, a self-regulating filter for introduction of Si into the Al metal layer is provided. Si is introduced into the Al metal layer by migration through a suitably deposited Ti layer, rather than during Al layer deposition.
    Type: Grant
    Filed: February 4, 1997
    Date of Patent: February 20, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Don A. Tiffin, William S. Brennan, David Soza, Patrick L. Smith, Allen White, Tim Z. Hossain
  • Patent number: 6173036
    Abstract: For small angles that are near critical angle, a primary incident X-ray beam has excellent depth resolution. A series of X-ray fluorescence measurements are performed at varying small angles and analyzed for depth profiling of elements within a substrate. One highly useful application of the X-ray fluorescence measurements is depth profiling of a dopant used in semiconductor manufacturing such as arsenic, phosphorus, and boron. In one example, angles are be varied from 0.01° to 0.20° and measurements made to profile arsenic distribution within a semiconductor wafer. In one embodiment, measurements are acquired using a total reflection X-ray fluorescence (TXRF) type system for both known and unknown profile distribution samples. The fluorescence measurements are denominated in counts/second terms and formed as ratios comparing the known and unknown sample results. The count ratios are compared to ratios of known to unknown samples that are acquired using a control analytical measurement technique.
    Type: Grant
    Filed: July 31, 1998
    Date of Patent: January 9, 2001
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Tim Z. Hossain, Don A. Tiffin, Cornelia A. Weiss
  • Patent number: 6144103
    Abstract: An improved solder bump composition and method advantageously employs a thin low-alpha layer of lead (Pb) deposited in close proximity to alpha particle sensitive devices, while ordinary (i.e., low cost) Pb is used for the bulk of the solder bump. This approach allows for reduced overall cost while still providing protection from alpha-particle induced soft errors. The low-alpha layer reduces the flux of alpha particle into devices in two ways. First, the low-alpha layer is itself essentially Pb.sup.210 free and therefore alpha particle emissions from the low-alpha layer are negligible. Second, the low-alpha layer is substantially opaque to alpha particles emitted by the ordinary Pb which includes Pb.sup.210. As a result, sensitive circuits on a semiconductor chip employing the improved solder bump are shielded from alpha particle emissions of the low-cost Pb.sup.210 -containing portion of a solder bump.
    Type: Grant
    Filed: August 9, 1999
    Date of Patent: November 7, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Roy Mark Miller, Bernd Maile, Don A. Tiffin, Tim Z. Hossain
  • Patent number: 6097079
    Abstract: An interlevel dielectric and a method for making same wherein boron is introduced into the dielectric though an implantation process. During the implantation process, either the boron-10 or the boron-11 boron isotope may be selected and introduced into the dielectric. Boron is introduced to make the dielectric flow at lower temperatures. Selectively implanting boron-10 or boron-11 during implantation, as opposed to buying boron comprising a specific boron isotope from a supplier and introducing boron during CVD, lowers the production costs. Furthermore, introducing boron into the dielectric during the implantation process as opposed to during deposition of the dielectric during a CVD process, the dielectric layer is free of "boron" bumps. Boron-bearing dielectrics can be made to made to flow at lower temperatures than dielectrics which do not contain boron.
    Type: Grant
    Filed: February 4, 1999
    Date of Patent: August 1, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Tim Z. Hossain, Franklin D. Crawford, Jr., Don A. Tiffin
  • Patent number: 6075261
    Abstract: A neutron detecting semiconductor device and process for fabricating the same is provided. In one particular embodiment, a semiconductor device for detecting neutrons is formed by forming one or more memory cells on a substrate and forming a neutron-reactant material over the one or more memory cells. Upon reacting with a neutron, the neutron-reactant material emits one or more particles capable of inducing a state change in the one or more memory cells. The neutron-reactant material may be formed from a borophosphosilicate glass (BPSG) having a relatively high concentration of .sup.10 Boron. For example, the concentration .sup.10 Boron may range from 80 to 100 percent or 95 to 100 percent of the total Boron concentration in the BPSG material.
    Type: Grant
    Filed: August 22, 1997
    Date of Patent: June 13, 2000
    Assignee: Advanced Micro Devices
    Inventors: Tim Z. Hossain, Franklin D. Crawford, Jr., Don A. Tiffin
  • Patent number: 5965945
    Abstract: An improved solder bump composition and method advantageously employs a thin low-alpha layer of lead (Pb) deposited in close proximity to alpha particle sensitive devices, while ordinary (i.e., low cost) Pb is used for the bulk of the solder bump. This approach allows for reduced overall cost while still providing protection from alpha-particle induced soft errors. The low-alpha layer reduces the flux of alpha particle into devices in two ways. First, the low-alpha layer is itself essentially Pb.sup.210 free and therefore alpha particle emissions from the low-alpha layer are negligible. Second, the low-alpha layer is substantially opaque to alpha particles emitted by the ordinary Pb which includes Pb.sup.210. As a result, sensitive circuits on a semiconductor chip employing the improved solder bump are shielded from alpha particle emissions of the low-cost Pb.sup.210 -containing portion of a solder bump.
    Type: Grant
    Filed: November 12, 1998
    Date of Patent: October 12, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Roy Mark Miller, Bernd Maile, Don A. Tiffin, Tim Z. Hossain
  • Patent number: 5913131
    Abstract: An interlevel dielectric and a method for making same wherein boron is introduced into the dielectric though an implantation process. During the implantation process, either the boron-10 or the boron-11 boron isotope may be selected and introduced into the dielectric. Boron is introduced to make the dielectric flow at lower temperatures. Selectively implanting boron-10 or boron-11 during implantation, as opposed to buying boron comprising a specific boron isotope from a supplier and introducing boron during CVD, lowers the production costs. Furthermore, by introducing boron into the dielectric during the implantation process as opposed to during deposition of the dielectric during a CVD process, the dielectric layer is free of boron bumps. Boron-bearing dielectrics can be made to made to flow at lower temperatures than dielectrics which do not contain boron.
    Type: Grant
    Filed: November 14, 1996
    Date of Patent: June 15, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Tim Z. Hossain, Franklin D. Crawford, Jr., Don A. Tiffin