Abstract: A multi-machine cooperation method, a scheduling device, and a multi-machine cooperation system are described. The multi-machine cooperation method includes: determining, by a first autonomous robot when detecting an abnormal condition during operation, whether the abnormal condition can be independently processed; and when the abnormal condition cannot be independently processed, sending, by the first autonomous robot, an assistance request to another device in an Internet of Things in which the first autonomous robot is located. In the specification, a multi-machine cooperation operation between autonomous robots or between an autonomous robot and another device can be implemented.

Abstract: A front end circuit of a voltage regulator is provided. The front end circuit comprises an analog front end, a low-resolution analog-to-digital converter, and a reference voltage provider. The front end circuit emulates the performance of a high-resolution analog-to-digital converter by coupling the analog front end to the low-resolution analog-to-digital converter. The reference voltage provider provides two closely interrelated reference voltages which track each other. The digital design can remove narrow pulses easily. Therefore the front end circuit has a higher noise resistance, and costs much lower than the high-resolution analog-to-digital converter of the prior art.

Abstract: A pulse center detection circuit, which utilizes the characteristics of the comparator combined with its positive input terminal and negative input terminal during the charging and discharging process. Thus, the comparator can output a detected pulse center signal accurately. The pulse center detection circuit of the invention utilizes an analog differential circuit in order to decrease noise interference and the pulse center can be precisely detected. Thus, the invention can be broadly used for a monitor circuit design to detect a flyback pulse center and can also be used for a general periodic pulse which requires detection of its pulse center.

Abstract: A digital pulse filtering circuit for filtering out pulses of specific pulse widths in a composite signal is provided. The digital pulse filtering circuit includes a sampling circuit for sampling the input composite signal based on a periodic clock signal to thereby generate a plurality of sampled signals of the input composite signal. In response to these sampled signals, a detection circuit outputs a low-frequency composite signal which is a filtered version of the input composite signal. The digital pulse filtering circuit is completely based on digital circuitry which can be built in integrated circuits. The cutoff frequency of the digital pulse filtering circuit is dependent on the frequency of the clock signal, which is very easy and accurate to adjust.

Abstract: A digital pulse filtering circuit for processing composite sync signals is provided. The digital pulse filtering circuit can determine the polarity of an input composite sync signal composed of a horizontal sync signal and a vertical sync signal. The horizontal sync signal is a first periodic pulse train having a first pulse width, while the vertical sync signal is a second periodic pulse train having a second pulse width. The digital pulse filtering circuit includes a horizontal sync filter for filtering out all pulses in the input composite sync signal that have a pulse width less than the pulse width of the horizontal sync signal; and a vertical sync filter, coupled to receive the output of said horizontal sync filter, for filtering out all pulses in the output of said horizontal sync filter that have a pulse width less than the pulse width of the vertical sync signal. The output of said indicating the polarity of the input composite sync signal.