Abstract: A tester comprises test logic and a connector for at least one device under test. The connector, which may comprise a wafer probe for dice on a wafer or a test fixture or either packaged integrated circuit devices or circuit board modules, has connections for the device under test that present an impedance selected to emulate the characteristic impedance of an end-use environment of the device under test. For example, in an embodiment in which the device under test comprises DDR memory and the end-use environment is a DDR memory module, the characteristic impedance is approximately 60 ohms. Because this accurate simulation is available even for dice on a wafer, the needless expense associated with packaging defective dies and assembling defective dies into modules can be avoided.

Abstract: A tester comprises test logic and a connector for at least one device under test. The connector, which may comprise a wafer probe for dice on a wafer or a test fixture for packaged integrated circuit devices, has connections for the device under test that present an impedance selected to emulate the characteristic impedance of an end-use environment of the device under test. For example, in an embodiment in which the device under test comprises a logic device using Rambus Signaling Levels (RSL) to communicate to other devices and the end-use environment is connection to a Rambus channel, the characteristic impedance is between approximately 20 and 60 ohms. If, on the other hand, the end-use environment is connection to a Rambus memory module, then the characteristic impedance is approximately 28 ohms. Alternatively, if the end-use environment is connection to a DDR memory module, then the characteristic impedance is approximately 60 ohms.

Abstract: A tester comprises test logic and a connector for at least one device under test. The connector, which may comprise a wafer probe for dice on a wafer or a test fixture or either packaged integrated circuit devices or circuit board modules, has connections for the device under test that present an impedance selected to emulate the characteristic impedance of an end-use environment of the device under test. For example, in an embodiment in which the device under test comprises DDR memory and the end-use environment is a DDR memory module, the characteristic impedance is approximately 60 ohms. Thus, the tester of the present invention can accurately simulate operational behavior in an end-use environment of the device under test. Because this accurate simulation is available even for dice on a wafer, the needless expense associated with packaging defective dies and assembling defective dies into modules can be avoided.

Abstract: A tester comprises test logic and a connector for at least one device under test. The connector, which may comprise a wafer probe for dice on a wafer or a test fixture for packaged integrated circuit devices, has connections for the device under test that present an impedance selected to emulate the characteristic impedance of an end-use environment of the device under test. For example, in an embodiment in which the device under test comprises Rambus memory and the end-use environment is a Rambus channel, the characteristic impedance is between approximately 20 and 60 ohms. If, on the other hand, the end-use environment is a Rambus memory module, then the characteristic impedance is approximately 28 ohms. Thus, the tester of the present invention can accurately simulate operational behavior in an end-use environment of the device under test.