Abstract: A coaxial transmission line structure having a center conductor section having an input contact and an output contact the output contact being larger than the input contact, the center conductor having a plurality of different geometrically shaped, electrically conductive layers having sizes progressively increasing from the input contact to the larger output contact to conductor transition from the input contact to the larger output contact, the electrically conductive layers being electrically interconnected by staggered microvias passing through dielectric layers to the center, and (B) an outer conductor section disposed about, coaxial with, and electrically isolated from, the center conductor by the dielectric layers.

Abstract: A coaxial transmission line structure having a center conductor section having an input contact and an output contact the output contact being larger than the input contact, the center conductor having a plurality of different geometrically shaped, electrically conductive layers having sizes progressively increasing from the input contact to the larger output contact to conductor transition from the input contact to the larger output contact, the electrically conductive layers being electrically interconnected by staggered microvias passing through dielectric layers to the center, and (B) an outer conductor section disposed about, coaxial with, and electrically isolated from, the center conductor by the dielectric layers.

Abstract: A mixed-signal, multilayer printed wiring board fabricated in a single lamination step is described. The PWB includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the PWB. The PWB includes a number of unit cells with radiating elements and an RF cage disposed around each unit cell to isolate the unit cell. A plurality of flip-chip circuits are disposed on an external surface of the PWB and a heat sink can be disposed over the flip chip components.

Abstract: Embodiments of the concepts described herein are directed toward a common RF building block in the form of a monolithic assembly for an AESA array featuring a scalable RF design based on 2n:3 combining. The monopulse network building blocks are substantially identical, enabling an interchangeable sub-array architecture that is independent of position in the AESA aperture and receive sum channel sidelobe performance. In one embodiment, a passive Monopulse Beamformer may provide the passive 2n:3 RF coupling/combining network and an active Monopulse Processor may perform amplitude and phase weighting for the combined signals from the Monopulse Beamformer.

Abstract: In one aspect, an active electronically scanned array (AESA) card includes a printed wiring board (PWB) that includes a first set of metal layers used to provide RF signal distribution, a second set of metal layers used to provide digital logical distribution, a third set of metal layers used to provide power distribution and a fourth set of metal layers used to provide RF signal distribution. The PWB comprises at least one transmit/receive (T/R) channel used in an AESA.

Abstract: A mixed-signal, multilayer printed wiring board fabricated in a single lamination step is described. The PWB includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the PWB. The PWB includes a number of unit cells with radiating elements and an RF cage disposed around each unit cell to isolate the unit cell. A plurality of flip-chip circuits are disposed on an external surface of the PWB and a heat sink can be disposed over the flip chip components.

Abstract: Embodiments of the concepts described herein are directed toward a common RF building block in the form of a monolithic assembly for an AESA array featuring a scalable RF design based on 2n:3 combining. The monopulse network building blocks are substantially identical, enabling an interchangeable sub-array architecture that is independent of position in the AESA aperture and receive sum channel sidelobe performance. In one embodiment, a passive Monopulse Beamformer may provide the passive 2n:3 RF coupling/combining network and an active Monopulse Processor may perform amplitude and phase weighting for the combined signals from the Monopulse Beamformer.

Abstract: In one aspect, an active electronically scanned array (AESA) card includes a printed wiring board (PWB) that includes a first set of metal layers used to provide RF signal distribution, a second set of metal layers used to provide digital logical distribution, a third set of metal layers used to provide power distribution and a fourth set of metal layers used to provide RF signal distribution. The PWB comprises at least one transmit/receive (T/R) channel used in an AESA.

Abstract: A mixed-signal, multilayer printed wiring board fabricated in a single lamination step is described. The PWB includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the PWB. The PWB includes a number of unit cells with radiating elements and an RF cage disposed around each unit cell to isolate the unit cell. A plurality of flip-chip circuits are disposed on an external surface of the PWB and a heat sink can be disposed over the flip chip components.

Abstract: A mixed-signal, multilayer printed wiring board fabricated in a single lamination step is described. The PWB includes one or more radio frequency (RF) interconnects between different circuit layers on different circuit boards which make up the PWB. The PWB includes a number of unit cells with radiating elements and an RF cage disposed around each unit cell to isolate the unit cell. A plurality of flip-chip circuits are disposed on an external surface of the PWB and a heat sink can be disposed over the flip chip components.