Abstract: A method and device for stabilizing cervical vertebrae includes a plate with at least two slots. The device also includes at least two screws including a lower threaded bone-engaging shaft, a shoulder which will not pass through said plate slots and an upper threaded shaft. The screws are positioned and the plate rests on top of the screw shoulders. Locking, low profile caps secure the plate to the screws.

Abstract: A method for making submicron dielectric windows for electron tunneling between a floating gate and substrate in a semiconductor EEPROM device. A mask edge overlying an oxide layer on a substrate is undercut a small distance, the area surrounding that small distance is built up with oxide, then a thin layer of oxide is formed in the undercut distance to serve as a tunneling window.

Abstract: An apparatus and method for integrating a submicron CMOS device and a non-volatile memory, wherein a thermal oxide layer is formed over a semiconductor substrate and a two layered polysilicon non-volatile memory device formed thereon. A portion of the thermal oxide is removed by etching, a thin gate oxide and a third layer of polysilicon having a submicron depth is deposited onto the etched region. The layer of polysilicon is used as the gate for the submicron CMOS device. In so doing a submicron CMOS device may be formed without subjecting the device to the significant re-oxidation required in formation processes for dual poly non-volatile memory devices such as EPROMs and EEPROMs, and separate device optimization is achieved.

Abstract: A bipolar ROM having a polysilicon PN junction diode as the matrix element for each bit of storage, wherein the diode is constructed laterally to the associated word line of the array. The word line and diode are implanted with impurities, then metal is deposited on the exposed surfaces of the polysilicon and the structure undergoes a sintering process. A layer of oxide covers the structure and a metal bit line connection is made to the diode P-type section, while the word line and other section of the diode are N-type. P and N type regions may be interchanged, as the polarity of a bit line or word line is a function of drive and sense circuitry. This combination of structure and method allows the use of polysilicon because of the lower sheet resistance and higher speed. Also, the use of PN junction diodes is possible instead of a design requiring Schottky diodes or transistors as matrix elements.