Abstract: A memory structure includes a memory module divided into low order banks and high order banks. The low order banks are used as conventional memory. The high order banks are used as either conventional memory or ECC memory, depending upon routing of data. In one embodiment, data from the high order banks are routed through a primary multiplexer to a data bus when the high order banks are used as conventional memory. When the high order banks are used as ECC memory, data from the auxiliary section is routed through the primary multiplexer to an error correction circuit. A secondary multiplexer combines ECC bits from the auxiliary section of the module or a dedicated ECC memory on a motherboard. The auxiliary section thus supplements the onboard ECC memory to provide support for an effectively larger ECC memory for use with error intolerant applications that require error correction.

Abstract: A memory structure includes a memory module divided into low order banks and high order banks. The low order banks are used as conventional memory. The high order banks are used as either conventional memory or ECC memory, depending upon routing of data. In one embodiment, data from the high order banks are routed through a primary multiplexer to a data bus when the high order banks are used as conventional memory. When the high order banks are used as ECC memory, data from the auxiliary section is routed through the primary multiplexer to an error correction circuit. A secondary multiplexer combines ECC bits from the auxiliary section of the module or a dedicated ECC memory on a motherboard. The auxiliary section thus supplements the onboard ECC memory to provide support for an effectively larger ECC memory for use with error intolerant applications that require error correction.

Abstract: A system includes a printed circuit board (PCB) having multiple bonding sites and a packaged integrated circuit (IC) having multiple conductive portions for electrically contacting respective bonding sites when the IC is mounted thereon. A portion of the package is formed of a magnetic material. The system also includes a magnet to controllably induce a magnetic field at the PCB having a strength sufficient to attract the magnetic material provided in the IC package and to hold the packaged IC onto the PCB. The system also includes a testing unit for evaluating the PCB and packaged IC while the packaged IC is held onto the PCB by the magnetic field induced by the magnet. The IC package comprises a semiconductor IC chip encapsulated within a casing and a lead frame electrically coupled to the semiconductor IC chip. The lead frame includes the magnetic material.

Abstract: A memory structure includes a memory module divided into low order banks and high order banks. The low order banks are used as conventional memory. The high order banks are used as either conventional memory or ECC memory, depending upon routing of data. In one embodiment, data from the high order banks are routed through a primary multiplexer to a data bus when the high order banks are used as conventional memory. When the high order banks are used as ECC memory, data from the auxiliary section is routed through the primary multiplexer to an error correction circuit. A secondary multiplexer combines ECC bits from the auxiliary section of the module or a dedicated ECC memory on a motherboard. The auxiliary section thus supplements the onboard ECC memory to provide support for an effectively larger ECC memory for use with error intolerant applications that require error correction.

Abstract: A memory structure includes a memory module divided into low order banks and high order banks. The low order banks are used as conventional memory. The high order banks are used as either conventional memory or ECC memory, depending upon routing of data. In one embodiment, data from the high order banks are routed through a primary multiplexer to a data bus when the high order banks are used as conventional memory. When the high order banks are used as ECC memory, data from the auxiliary section is routed through the primary multiplexer to an error correction circuit. A secondary multiplexer combines ECC bits from the auxiliary section of the module or a dedicated ECC memory on a motherboard. The auxiliary section thus supplements the onboard ECC memory to provide support for an effectively larger ECC memory for use with error intolerant applications that require error correction.

Abstract: A memory structure includes a memory module divided into low order banks and high order banks. The low order banks are used as conventional memory. The high order banks are used as either conventional memory or ECC memory, depending upon routing of data. In one embodiment, data from the high order banks are routed through a primary multiplexer to a data bus when the high order banks are used as conventional memory. When the high order banks are used as ECC memory, data from the auxiliary section is routed through the primary multiplexer to an error correction circuit. A secondary multiplexer combines ECC bits from the auxiliary section of the module or a dedicated ECC memory on a motherboard. The auxiliary section thus supplements the onboard ECC memory to provide support for an effectively larger ECC memory for use with error intolerant applications that require error correction.

Abstract: An integrated circuit (IC) device is mounted onto a printed circuit board (PCB) by inducing a magnetic field of a selected strength at the surface of the PCB to temporarily hold the IC device onto the PCB. The IC device is provided with magnetic material which is attracted by the magnetic field. The magnetic field is maintained while the IC device and PCB are tested, and then subsequently during soldering when the IC device is permanently bonded to the PCB.

Abstract: A memory structure includes a memory module divided into low order banks and high order banks. The low order banks are used as conventional memory. The high order banks are used as either conventional memory or ECC memory, depending upon routing of data. In one embodiment, data from the high order banks are routed through a primary multiplexer to a data bus when the high order banks are used as conventional memory. When the high order banks are used as ECC memory, data from the auxiliary section is routed through the primary multiplexer to an error correction circuit. A secondary multiplexer combines ECC bits from the auxiliary section of the module or a dedicated ECC memory on a motherboard. The auxiliary section thus supplements the onboard ECC memory to provide support for an effectively larger ECC memory for use with error intolerant applications that require error correction.

Abstract: An integrated circuit (IC) device is mounted onto a printed circuit board (PCB) by inducing a magnetic field of a selected strength at the surface of the PCB to temporarily hold the IC device onto the PCB. The IC device is provided with magnetic material which is attracted by the magnetic field. The magnetic field is maintained while the IC device and PCB are tested, and then subsequently during soldering when the IC device is permanently bonded to the PCB.

Abstract: An integrated circuit (IC) device is mounted onto a printed circuit board (PCB) by inducing a magnetic field of a selected strength at the surface of the PCB to temporarily hold the IC device onto the PCB. The IC device is provided with magnetic material which is attracted by the magnetic field. The magnetic field is maintained while the IC device and PCB are tested, and then subsequently during soldering when the IC device is permanently bonded to the PCB.

Abstract: An application-specific integrated circuit (ASIC) for enabling access to memory. ASIC includes a decryptor, a valid authorization storage component, an upgrade verifier, an upgrade storage component, and an enabling component. The decryptor inputs an encrypted authorization code and outputs a decrypted authorization code. The valid authorization storage component stores and outputs a valid authorization code. The upgrade verifier inputs the decrypted authorization code and the valid authorization code, compares the decrypted authorization code to the valid authorization code to determine whether access to the portion of memory is authorized, and outputs a signal to enable access to the portion of memory. The upgrade storage component stores the signal output from the upgrade verifier. The enabling component inputs a memory access signal and a signal stored in the upgrade storage component and outputs a signal indicating whether the portion of memory is enabled.

Abstract: An interface system between an end of a filament composite tube and a rigid interior end fitting. The system includes a plurality of traplocks having varying wall thicknesses at the bases thereof. The traplocks also have varying angles of the bearing faces thereof. A Y-shaped seal is disposed between an inboard end of the fitting and the inside of the composite tube.

Abstract: An integrated circuit (IC) device is mounted onto a printed circuit board (PCB) by inducing a magnetic field of a selected strength at the surface of the PCB to temporarily hold the IC device onto the PCB. The IC device is provided with magnetic material which is attracted by the magnetic field. The magnetic field is maintained while the IC device and PCB are tested, and then subsequently during soldering when the IC device is permanently bonded to the PCB.

Abstract: An integrated circuit (IC) device is mounted onto a printed circuit board (PCB) by inducing a magnetic field of a selected strength at the surface of the PCB to temporarily hold the IC device onto the PCB. The IC device is provided with magnetic material which is attracted by the magnetic field. The magnetic field is maintained while the IC device and PCB are tested, and then subsequently during soldering when the IC device is permanently bonded to the PCB.

Abstract: A well flow conductor and method of manufacture therefor. The well flow conductor includes: (1) a composite liner tube composed of a plurality of overlapping, resin-bonded composite plies and adapted to conduct a fluid flow therethrough and (2) a composite outer structure surrounding the composite liner tube and composed of a plurality of overlapping, resin-bonded composite plies arranged in a plurality of opposed helices about a centerline of the composite liner tube, the opposed helices intersecting at predetermined axial and radial locations on an outer surface of the composite liner tube to form nodes extending radially outwardly from the outer surface to form standoffs therefrom, the standoffs capable of centralizing the well flow conductor within an interior of a casing having a larger radius than that of the well flow conductor.

Abstract: An integrated circuit (IC) device is mounted onto a printed circuit board (PCB) by inducing a magnetic field of a selected strength at the surface of the PCB to temporarily hold the IC device onto the PCB. The IC device is provided with magnetic material which is attracted by the magnetic field. The magnetic field is maintained while the IC device and PCB are tested, and then subsequently during soldering when the IC device is permanently bonded to the PCB.

Abstract: A collapsible fuel tank system for use on aircraft and the like includes a plurality of nestable shell sections which, when assembled in proper edgewise orientation, form a shell for the fuel tank. A nose cone and a number of shell-reinforcing bulkheads are axially spaced within the fuel tank and have a ring-and-groove construction for facilitating manual assembly of a fuel tank. A preassembled fuel management system includes an elongated flexible liner encapsulating the bulkheads and having snap connections for quick attachment to the shell interior. All of the components of a plurality of fuel tanks are housed in a single container for shipping and handling purposes.

Abstract: A riser pipe assembly is provided for interconnecting a subsea wellhead on an ocean floor with an above-surface platform. The assembly includes at least one cable extending generally between the wellhead and the platform to provide vertical support for the assembly. A plurality of support plates are fixed to the cable at predetermined spaced locations therealong. At least one riser pipe string extends between the wellhead and the platform and includes a plurality of riser pipes engaged end-to-end. In one embodiment of the invention, each riser pipe includes a lower bell-shaped end and an upper spigot-shaped end inserted into the bell-shaped end of the immediately adjacent riser pipe thereabove. The lower bell-shaped end of each riser pipe rests by gravity on and is supported by one of the support plates. In another embodiment of the invention, each riser pipe includes an upper bell-shaped end and a lower spigot-shaped end inserted into the bell-shaped end of the immediately adjacent riser pipe therebelow.