Abstract: An arrangement for automatic replacement of faulty memory elements in a M-row by N-column memory array provides increased memory reliability. The memory array is coupled to a computer by a group of transceivers. Replacement memory elements are provided in a column replacement fashion and are selectively enabled on a row-by-row basis for detected faults within the memory elements of the memory array. Transceivers are appropriately enabled to select one of two memory elements for each column. For a detected fault in a memory element, each memory element is shifted to an adjacent memory element and the replacement memory element is employed to substituted for the last regular memory element.