Patents by Inventor Donald E. Fox

Donald E. Fox has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for microprocessor test insertion reduction
    Patent number: 7010734
    Abstract: Methods for reducing the requirement for multiple test vector sub-set insertions of a test vector set on test equipment having a limited memory size. In one embodiment, a single, selective test vector sub-set is utilized in the pre-burn-in test phase of microprocessors and multiple test vector sub-set insertions of a test vector set are utilized in the post-burn-in test phase. In one embodiment, the single, selective test vector sub-set includes selected test vectors from some or all of the test vector sub-sets used in the post-burn-in test phase and is sized to fit within the fixed memory capacity of the test equipment. In another embodiment, a single, selective test vector sub-set is utilized in both the pre-burn and post-burn test phases.
    Type: Grant
    Filed: October 21, 2002
    Date of Patent: March 7, 2006
    Assignee: Sun Microsystems, Inc.
    Inventors: Upendra S. Brahme, Donald E. Fox
  • Method for microprocessor test insertion reduction
    Publication number: 20040078677
    Abstract: Methods for reducing the requirement for multiple test vector sub-set insertions of a test vector set on test equipment having a limited memory size. In one embodiment, a single, selective test vector sub-set is utilized in the pre-burn-in test phase of microprocessors and multiple test vector sub-set insertions of a test vector set are utilized in the post-burn-in test phase. In one embodiment, the single, selective test vector sub-set includes selected test vectors from some or all of the test vector sub-sets used in the post-burn-in test phase and is sized to fit within the fixed memory capacity of the test equipment. In another embodiment, a single, selective test vector sub-set is utilized in both the pre-burn and post-burn test phases.
    Type: Application
    Filed: October 21, 2002
    Publication date: April 22, 2004
    Applicant: Sun Microsystems, Inc.
    Inventors: Upendra S. Brahme, Donald E. Fox