Patents by Inventor Donald Frank Hemmenway

Donald Frank Hemmenway has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Wafer trench article and process
    Patent number: 6551897
    Abstract: A bonded wafer 100 has a device substrate 16 with isolation trenches 30 defining device regions 18. Oxide dogbone structures are removed before filling trenches 30. Voids 36 in the trenches are spaced from the top of the trenches. The trenches are covered with an oxide layer 30 and filled with polysilicon 34. A LOCOS mask structure comprising a layer of CVD pad oxide and silicon nitride 50 cover the trenches and the adjacent device substrate regions.
    Type: Grant
    Filed: November 16, 2001
    Date of Patent: April 22, 2003
    Assignee: Intersil Americas Inc.
    Inventors: Patrick Anthony Begley, Donald Frank Hemmenway, George Bajor, Anthony Lee Rivoli, Jeanne Marie McNamara, Michael Sean Carmody, Dustin Alexander Woodbury
  • Wafer trench article and process
    Publication number: 20020076915
    Abstract: A bonded wafer 100 has a device substrate 16 with isolation trenches 30 defining device regions 18. Oxide dogbone structures are removed before filling trenches 30. Voids 36 in the trenches are spaced from the top of the trenches. The trenches are covered with an oxide layer 30 and filled with polysilicon 34. A LOCOS mask structure comprising a layer of CVD pad oxide and silicon nitride 50 cover the trenches and the adjacent device substrate regions.
    Type: Application
    Filed: November 16, 2001
    Publication date: June 20, 2002
    Applicant: HARRIS CORPORATION
    Inventors: Patrick Anthony Begley, Donald Frank Hemmenway, George Bajor, Anthony Lee Rivoli, Jeanne Marie McNamara, Michael Sean Carmody, Dustin Alexander Woodbury
  • Wafer trench article and process
    Patent number: 6365953
    Abstract: A bonded wafer 100 has a device substrate 16 with isolation trenches 30 defining device regions 18. Oxide dogbone structures are removed before filling trenches 30. Voids 36 in the trenches are spaced from the top of the trenches. The trenches are covered with an oxide layer 30 and filled with polysilicon 34. A LOCOS mask structure comprising a layer of CVD pad oxide and silicon nitride 50 cover the trenches and the adjacent device substrate regions.
    Type: Grant
    Filed: April 1, 1999
    Date of Patent: April 2, 2002
    Assignee: Intersil Americas Inc.
    Inventors: Patrick Anthony Begley, Donald Frank Hemmenway, George Bajor, Anthony Lee Rivoli, Jeanne Marie McNamara, Michael Sean Carmody, Dustin Alexander Woodbury
  • WAFER TRENCH ARTICLE AND PROCESS
    Publication number: 20010045614
    Abstract: A bonded wafer 100 has a device substrate 16 with isolation trenches 30 defining device regions 18. Oxide dogbone structures are removed before filling trenches 30. Voids 36 in the trenches are spaced from the top of the trenches. The trenches are covered with an oxide layer 30 and filled with polysilicon 34. A LOCOS mask structure comprising a layer of CVD pad oxide and silicon nitride 50 cover the trenches and the adjacent device substrate regions.
    Type: Application
    Filed: April 1, 1999
    Publication date: November 29, 2001
    Inventors: PATRICK ANTHONY BEGLEY, DONALD FRANK HEMMENWAY, GEORGE BAJOR, ANTHONY LEE RIVOLI, JEANNE MARIE MCNAMARA, MICHAEL SEAN CARMODY, DUSTIN ALEXANDER WOODBURY
  • Process of forming trench isolation device
    Patent number: 5933746
    Abstract: A bonded wafer 100 has a device substrate 16 with isolation trenches 30 defining device regions 18. Oxide dogbone structures are removed before filling trenches 30. Voids 36 in the trenches are spaced from the top of the trenches. The trenches are covered with an oxide layer 30 and filled with polysilicon 34. A LOCOS mask structure comprising a layer of CVD pad oxide and silicon nitride 50 cover the trenches and the adjacent device substrate regions.
    Type: Grant
    Filed: April 23, 1996
    Date of Patent: August 3, 1999
    Assignee: Harris Corporation
    Inventors: Patrick Anthony Begley, Donald Frank Hemmenway, George Bajor, Anthony Lee Rivoli, Jeanne Marie McNamara, Michael Sean Carmody, Dustin Alexander Woodbury
  • Late process method and apparatus for trench isolation
    Patent number: 5920108
    Abstract: Trenches 72 are formed in substrate 17 late in the fabrication process. In order to avoid trench sidewall stresses that cause defects in the substrate monocrystalline lattice, the trenches are filled after a final thick thermal oxide layer, such as a LOCOS layer 25, is grown. The trenches 72 are also filled after a final deep diffusion, i.e. a diffusion in excess of one micron.
    Type: Grant
    Filed: November 7, 1996
    Date of Patent: July 6, 1999
    Assignee: Harris Corporation
    Inventors: Donald Frank Hemmenway, Lawrence George Pearce
  • Late process method for trench isolation
    Patent number: 5872044
    Abstract: Trenches 72 are formed in substrate 17 late in the fabrication process. In order to avoid trench sidewall stresses that cause defects in the substrate monocrystalline lattice, the trenches are filled after a final thick thermal oxide layer, such as a LOCOS layer 25, is grown. The trenches 72 are also filled after a final deep diffusion, i.e. a diffusion in excess of one micron.
    Type: Grant
    Filed: October 17, 1996
    Date of Patent: February 16, 1999
    Assignee: Harris Corporation
    Inventors: Donald Frank Hemmenway, Lawrence George Pearce
  • Trench isolation stress relief
    Patent number: 5683075
    Abstract: In a microelectronic device formed on a substrate 12, a pair of trenches 30, 36 connected at their intersection by trench 54 which is disposed at an obtuse angle with respect to each of the pair of trenches 30 and 36.
    Type: Grant
    Filed: June 5, 1995
    Date of Patent: November 4, 1997
    Assignee: Harris Corporation
    Inventors: Stephen Joseph Gaul, Donald Frank Hemmenway