Abstract: Transceiver apparatus includes a transmitter circuit constructed with either emitter coupled logic (ECL) circuitry or programmable array logic circuitry, and a receiver circuit constructed with ECL circuitry. The transmitter circuit encodes a binary data signal received for transmission as a three-level modified duobinary encoded data signal and the receiver circuit decodes the received three-level encoded data signal to provide a binary data signal corresponding to the data signal received at the transmitter circuit for transmission. Both the transmitter and receiver circuits include features enabling transmitting and receiving high data-rate data signals.

Abstract: An expert system for performing a redesign operation in connection with an original design. A working memory includes a plurality of blackboards each for storing a design representation and desired operational characteristics. A simulation component comprises a plurality of simulators each for generating simulated operational characteristics in connection with a design representation on one of said blackboards. A diagnostic component identifies operational discrepancies between the simulated operational characteristics and the desired operational characteristics and the causes of the operational characteristics. A redesign component generates a redesign of the design representations on the blackboards in response to the original design and the identified dicrepancies and discrepancy causes.

Abstract: In a serial data communications system, an embedded clock is recovered from a data signal by incrementally controlling the frequency (thus phase) of a voltage-controlled oscillator in response to the difference in phase between the incoming data signal and the clock oscillator output. A transition of the data signal is detected and used to initiate a control pulse which is terminated upon the next transition in the clock oscillator output. A reference pulse is also generated which has a width about equal to a half cycle of the clock. These pulses are used to generate the voltage control for the oscillator, so that the phase relationship varies to see an equilibrium where the pulses are of equal width and the transitions of the clock are at midpoint of potential transitions of the data signal. The control can tolerate relatively long periods where there is no transition of the data signal.

Abstract: A chassis and circuit modules for controlling electromagnetic interference in high-speed digital transceiver circuits. The impedance between a reference ground point and the transceiver circuits and a chassis wall through which the transceiver circuit signals pass is kept very low by intimate physical contact between a conductive bulkhead section of the module and the ground plane used by the transceiver. In particular, there is disclosed an arrangement whereby a plurality of modules are placed adjacent one another in a cabinet. Each of the modules contains a conductive bulkhead section or handle, which engages other adjacent bulkhead sections, and which may have an input/output connector mounted thereon. Each module also has a printed circuit board mounted to the bulkhead section so that a forward-circuit reference path reserved for use by transceiver circuits is positioned adjacent the connector and electrically connected to both the connector and the front section via a low impedance path.