Patents by Inventor Donald Hitko
Donald Hitko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8958764Abstract: A method of and apparatus for detecting signal features including amplitude, phase and timing of recognizable input signals in a frequency band or spectrum of interest. One or more super-regenerative oscillators are provided, each having a center frequency and each detecting signal features of recognizable input signals in the frequency band or spectrum of interest during multiple, successive time slots. The center frequency of each of the one or more super-regenerative oscillators is varied between time slots in a selected sequence, preferably according to a Segmentlet algorithm. The one or more super-regenerative oscillators extract the signal features of each the recognizable input signals in different time slots and/or in different super-regenerative oscillator and with a different time-slot associated center frequency associated with the one or more super-regenerative oscillators, thereby providing a time-frequency-amplitude map of the frequency band or spectrum of interest.Type: GrantFiled: October 29, 2012Date of Patent: February 17, 2015Assignee: HRL Laboratories, LLCInventors: Zhiwei Xu, Donald A. Hitko, Peter Petre
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Patent number: 8860092Abstract: A heterojunction bipolar transistor having an emitter, a base, and a collector, the heterojunction bipolar transistor including a metallic sub-collector electrically and thermally coupled to the collector wherein the metallic sub-collector comprises a metallic thin film, and a collector contact electrically connected to the metallic sub-collector.Type: GrantFiled: September 22, 2008Date of Patent: October 14, 2014Assignee: HRL Laboratories, LLCInventors: James Chingwei Li, Donald A. Hitko, Yakov Royter, Pamela R. Patterson
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Patent number: 8374561Abstract: A non-Foster impedance power amplifier has a current amplifying device coupled in either an emitter-follower or source-follower configuration with a reactive load such as an antenna load. A negative impedance circuit is provided upstream of a gate or base or other control element of said current amplifying device.Type: GrantFiled: April 27, 2010Date of Patent: February 12, 2013Assignee: HRL Laboratories, LLCInventors: Michael W. Yung, Donald A. Hitko
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Publication number: 20130009724Abstract: A method of and circuit for improving stabilization of a non-Foster circuit. The method comprises steps of and the circuit includes means for measuring a noise hump power at an antenna port or an output port of the non-Foster circuit, comparing the measured noise hump power with a desired level of noise power that corresponds to a desired operating state of the non-Foster circuit, and tuning the non-Foster circuit to generate the desired level of noise power to achieve the desired operating state of the non-Foster circuit.Type: ApplicationFiled: July 5, 2012Publication date: January 10, 2013Applicant: HRL Laboratories, LLCInventors: Zhiwei Xu, Michael W. Yung, Donald A. Hitko, Carson R. White
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Publication number: 20130009720Abstract: An automatic tuning circuit for matching an antenna to a radio receiver. The automatic tuning circuit includes a tunable non-Foster circuit for coupling the receiver and the antenna; and sensing and feedback circuits for sensing the combined capacitance of the tunable non-Foster circuit and the antenna and for tuning the tunable non-Foster circuit to automatically minimize the combined capacitance of the tunable non-Foster circuit and the antenna.Type: ApplicationFiled: July 6, 2011Publication date: January 10, 2013Applicant: HRL LABORATORIES, LLCInventors: Carson R. White, Joseph S. Colburn, Michael W. Yung, Donald A. Hitko
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Publication number: 20130009722Abstract: An automatic tuning circuit for matching an antenna to a radio receiver. The automatic tuning circuit includes a tunable non-Foster circuit for coupling the receiver and the antenna; and sensing and feedback circuits for sensing the combined capacitance of the tunable non-Foster circuit and the antenna and for tuning the tunable non-Foster circuit to automatically minimize the combined capacitance of the tunable non-Foster circuit and the antenna.Type: ApplicationFiled: May 15, 2012Publication date: January 10, 2013Applicant: HRL LABORATORIES, LLCInventors: Carson R. White, Joseph S. Colburn, Michael W. Yung, Donald A. Hitko
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Publication number: 20120256709Abstract: A differential circuit topology that produces a tunable floating negative inductance, negative capacitance, negative resistance/conductance, or a combination of the three. These circuits are commonly referred to as “non-Foster circuits.” The disclosed embodiments of the circuits comprises two differential pairs of transistors that are cross-coupled, a load immittance, multiple current sources, two Common-Mode FeedBack (CMFB) networks, at least one tunable (variable) resistance, and two terminals across which the desired immittance is present. The disclosed embodiments of the circuits may be configured as either a Negative Impedance Inverter (NII) or a Negative Impedance Converter (NIC) and as either Open-Circuit-Stable (OCS) and Short-Circuit-Stable (SCS).Type: ApplicationFiled: April 6, 2012Publication date: October 11, 2012Applicant: HRL LABORATORIES, LLCInventors: Donald A. Hitko, Carson R. White, Michael W. Yung, David S. Matthews, Susan L. Morton, Jason W. May, Joseph S. Colburn
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Patent number: 7349471Abstract: A communication receiver (30) includes a data receiver (34) that receives a pulse-position modulated signal (38). A clock circuit (70) separates a reference clock signal (36) into multiple coordinating clock signals A, B, and C. Multiple time integrators (78) are gated to generate multiple time-integrated signals in response to the pulse-position modulated signal (38) and the coordinating clock signals A, B, and C. A combiner (96) forms a demodulated signal from the time-integrated signals IntA, IntB, and IntC.Type: GrantFiled: November 19, 2003Date of Patent: March 25, 2008Assignee: The Boeing CompanyInventors: Albert Cosand, Donald A. Hitko, Michael Yung
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Patent number: 7259444Abstract: In one embodiment, an optoelectronic device is provided having a pin photo diode including a semi-insulating substrate or layer, with a patterned implant region of a first dopant type. The pin photo diode includes an upper layer having semiconductor material with a second dopant type. An intermediate layer is provided having a substantially intrinsic semiconductor material. An upper layer contact is provided having a portion with a generally circular interior facing edge. The implant region has a first portion having an outer periphery substantially nonoverlapping with the interior facing edge of the upper layer contact. The implant region includes a contact portion located beyond the upper layer contact. A connecting portion couples the first portion and the contact portion of the implant region. In one embodiment, the device includes a heterojunction bipolar transistor coupled to the pin photo diode.Type: GrantFiled: July 20, 2004Date of Patent: August 21, 2007Assignee: HRL Laboratories, LLCInventors: Mary Y. Chen, Donald A. Hitko
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Patent number: 6952177Abstract: A traveling wave multiplying digital-to-analog converter has propagation-delay matched transmission lines for conversion of a high data rate digital input to a high frequency RF analog output, for example, at microwave and millimeter wave frequencies and above. The traveling wave multiplying digital-to-analog converter includes an array of constant, high impedance multiplying cells that are identical to improve component matching and propagation delay matching. The multiplying cells are connected in a spatial interleaving manner along bit lines that propagate the high bandwidth digital input. The interleaving effects a “spatial averaging” that maintains linearity of digital to analog conversion in the presence of any linear gradient ? from one cell to another across the array of multiplying cells.Type: GrantFiled: March 8, 2004Date of Patent: October 4, 2005Assignee: The Boeing CompanyInventor: Donald Hitko
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Publication number: 20050200508Abstract: A traveling wave multiplying digital-to-analog converter has propagation-delay matched transmission lines for conversion of a high data rate digital input to a high frequency RF analog output, for example, at microwave and millimeter wave frequencies and above. The traveling wave multiplying digital-to-analog converter includes an array of constant, high impedance multiplying cells that are identical to improve component matching and propagation delay matching. The multiplying cells are connected in a spatial interleaving manner along bit lines that propagate the high bandwidth digital input. The interleaving effects a “spatial averaging” that maintains linearity of digital to analog conversion in the presence of any linear gradient ? from one cell to another across the array of multiplying cells.Type: ApplicationFiled: March 8, 2004Publication date: September 15, 2005Applicant: The Boeing CompanyInventor: Donald Hitko
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Publication number: 20050105606Abstract: A communication receiver (30) includes a data receiver (34) that receives a pulse-position modulated signal (38). A clock circuit (70) separates a reference clock signal (36) into multiple coordinating clock signals A, B, and C. Multiple time integrators (78) are gated to generate multiple time-integrated signals in response to the pulse-position modulated signal (38) and the coordinating clock signals A, B, and C. A combiner (96) forms a demodulated signal from the time-integrated signals IntA, IntB, and IntC.Type: ApplicationFiled: November 19, 2003Publication date: May 19, 2005Applicant: THE BOEING COMPANYInventors: Albert Cosand, Donald Hitko, Michael Yung
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Patent number: 5467034Abstract: A sensor interface circuit and method are provided which realizes common mode rejection, compensates for external input impedance and internal loads and achieves a desired transfer response. The interface circuit is particularly useful for amplifying and conditioning signals generated by an oxygen sensor on an automotive vehicle. The sensor interface circuit has first and second inputs for receiving input voltages from a sensor which are joined together to provide a differential voltage representative of the voltage potential between the first and second inputs. RF filtering circuitry is coupled to both inputs. An amplifier having a gain and a first input receives a differential voltage and has an output coupled to a grounded switch for providing an output signal referenced to reference ground. A supply voltage is applied across the inputs and a current is supplied to one of the inputs.Type: GrantFiled: December 5, 1994Date of Patent: November 14, 1995Assignee: Delco Electronics CorporationInventors: Gregory J. Manlove, Donald A. Hitko