Patents by Inventor Donald J. Esses

Donald J. Esses has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6278129
    Abstract: A die including a corrosion monitoring feature is described. The die includes: (i) a surface including an active die region and a scribeline region that is adjacent the active die region; (ii) an insulating layer disposed above the surface and includes a first corrosion sensitive metal plug and a second corrosion sensitive metal plug in the scribeline region; and (iii) a metallization layer positioned above the insulating layer, the first corrosion sensitive metal plug and the second corrosion sensitive metal plug in the scribeline region and the metallization layer disposed above second corrosion sensitive metal plug is patterned to provide the metallization layer with a first opening extending from a top surface of the metallization layer down to a top surface of the second corrosion sensitive metal plug such that a solvent introduced above the top surface of the metallization layer flows into the second corrosion sensitive metal plug disposed below through the first opening in the metallization layer.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: August 21, 2001
    Assignee: LSI Logic Corporation
    Inventors: Emery O. Sugasawara, Donald J. Esses
  • Patent number: 6130173
    Abstract: A process of forming on an integrated circuit substrate at least two different gate masks having different lengths is described. The process includes: (i) providing the integrated circuit substrate having a surface; (ii) depositing on the surface a gate layer; and (iii) masking portions of the gate layer using a reticle having at least two die patterns including a first die pattern defining an image of a first gate electrode having a first length and a second die pattern defining an image of a second gate electrode having a second length, the first length being different from the second length and relative positioning of the image of the first gate electrode in the first die pattern and of the image of second gate electrode in the second die pattern is substantially similar.
    Type: Grant
    Filed: March 19, 1998
    Date of Patent: October 10, 2000
    Assignee: LSI Logic Corporation
    Inventor: Donald J. Esses
  • Patent number: 6103615
    Abstract: A die including a corrosion monitoring feature is described. The die includes: (i) a surface including an active die region and a scribeline region that is adjacent the active die region; (ii) an insulating layer disposed above the surface and includes a first corrosion sensitive metal plug and a second corrosion sensitive metal plug in the scribeline region; and (iii) a metallization layer positioned above the insulating layer, the first corrosion sensitive metal plug and the second corrosion sensitive metal plug in the scribeline region and the metallization layer disposed above second corrosion sensitive metal plug is patterned to provide the metallization layer with a first opening extending from a top surface of the metallization layer down to a top surface of the second corrosion sensitive metal plug such that a solvent introduced above the top surface of the metallization layer flows into the second corrosion sensitive metal plug disposed below through the first opening in the metallization layer.
    Type: Grant
    Filed: March 19, 1998
    Date of Patent: August 15, 2000
    Assignee: LSI Logic Corporation
    Inventors: Emery O. Sugasawara, Donald J. Esses